111 lines
3.3 KiB
Rust
111 lines
3.3 KiB
Rust
//! Watchdog
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//!
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//! The watchdog is a countdown timer that can restart parts of the chip if it reaches zero. This can be used to restart the
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//! processor if software gets stuck in an infinite loop. The programmer must periodically write a value to the watchdog to
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//! stop it from reaching zero.
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//!
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//! Credit: based on `rp-hal` implementation (also licensed Apache+MIT)
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use core::marker::PhantomData;
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use embassy_time::Duration;
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use crate::pac;
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use crate::peripherals::WATCHDOG;
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/// Watchdog peripheral
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pub struct Watchdog {
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phantom: PhantomData<WATCHDOG>,
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load_value: u32, // decremented by 2 per tick (µs)
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}
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impl Watchdog {
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/// Create a new `Watchdog`
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pub fn new(_watchdog: WATCHDOG) -> Self {
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Self {
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phantom: PhantomData,
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load_value: 0,
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}
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}
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/// Start tick generation on clk_tick which is driven from clk_ref.
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///
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/// # Arguments
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///
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/// * `cycles` - Total number of tick cycles before the next tick is generated.
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/// It is expected to be the frequency in MHz of clk_ref.
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pub fn enable_tick_generation(&mut self, cycles: u8) {
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let watchdog = pac::WATCHDOG;
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watchdog.tick().write(|w| {
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w.set_enable(true);
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w.set_cycles(cycles.into())
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});
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}
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/// Defines whether or not the watchdog timer should be paused when processor(s) are in debug mode
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/// or when JTAG is accessing bus fabric
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pub fn pause_on_debug(&mut self, pause: bool) {
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let watchdog = pac::WATCHDOG;
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watchdog.ctrl().write(|w| {
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w.set_pause_dbg0(pause);
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w.set_pause_dbg1(pause);
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w.set_pause_jtag(pause);
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})
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}
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fn load_counter(&self, counter: u32) {
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let watchdog = pac::WATCHDOG;
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watchdog.load().write_value(pac::watchdog::regs::Load(counter));
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}
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fn enable(&self, bit: bool) {
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let watchdog = pac::WATCHDOG;
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watchdog.ctrl().write(|w| w.set_enable(bit))
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}
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// Configure which hardware will be reset by the watchdog
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// (everything except ROSC, XOSC)
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fn configure_wdog_reset_triggers(&self) {
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let psm = pac::PSM;
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psm.wdsel().write_value(pac::psm::regs::Wdsel(
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0x0001ffff & !(0x01 << 0usize) & !(0x01 << 1usize),
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));
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}
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/// Feed the watchdog timer
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pub fn feed(&mut self) {
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self.load_counter(self.load_value)
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}
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/// Start the watchdog timer
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pub fn start(&mut self, period: Duration) {
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const MAX_PERIOD: u32 = 0xFFFFFF;
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let delay_us = period.as_micros();
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if delay_us > (MAX_PERIOD / 2) as u64 {
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panic!("Period cannot exceed {} microseconds", MAX_PERIOD / 2);
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}
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let delay_us = delay_us as u32;
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// Due to a logic error, the watchdog decrements by 2 and
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// the load value must be compensated; see RP2040-E1
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self.load_value = delay_us * 2;
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self.enable(false);
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self.configure_wdog_reset_triggers();
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self.load_counter(self.load_value);
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self.enable(true);
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}
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/// Trigger a system reset
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pub fn trigger_reset(&mut self) {
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self.configure_wdog_reset_triggers();
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self.pause_on_debug(false);
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self.enable(true);
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let watchdog = pac::WATCHDOG;
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watchdog.ctrl().write(|w| {
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w.set_trigger(true);
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})
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}
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}
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