b6a8703698
* Chips that have multiple cores will be exposed as chipname_corename, i.e. stm32wl55jc_cm4 * Chips that have single cores will use the chip family as feature name and pick the first and only core from the list * Add support for stm32wl55 chip family
40 lines
833 B
Rust
40 lines
833 B
Rust
#![no_std]
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#![no_main]
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#![feature(trait_alias)]
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#![feature(min_type_alias_impl_trait)]
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#![feature(impl_trait_in_bindings)]
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#![feature(type_alias_impl_trait)]
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#![allow(incomplete_features)]
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy_stm32::{
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gpio::{Level, Output},
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rcc::*,
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};
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use embedded_hal::digital::v2::OutputPin;
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use example_common::*;
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use cortex_m_rt::entry;
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#[entry]
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fn main() -> ! {
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info!("Hello World!");
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let mut p = embassy_stm32::init(Default::default());
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Rcc::new(p.RCC).enable_debug_wfe(&mut p.DBGMCU, true);
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let mut led = Output::new(p.PB5, Level::High);
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loop {
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info!("high");
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led.set_high().unwrap();
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cortex_m::asm::delay(1_000_000);
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info!("low");
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led.set_low().unwrap();
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cortex_m::asm::delay(1_000_000);
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}
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}
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