Vincent Stakenburg 7d6d274d55 Add MSI and PLL clock source for L4

2021-09-24 18:27:39 +02:00

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f0

stm32/metapac: check GPIO RCC regs are always found.

2021-08-19 23:59:50 +02:00

f4

stm32: move dbgmcu stuff to toplevel config setting, defaulting to true.

2021-08-19 23:50:19 +02:00

g0

Add support for STM32G0

2021-08-20 00:15:11 +02:00

h7

stm32: move dbgmcu stuff to toplevel config setting, defaulting to true.

2021-08-19 23:50:19 +02:00

l0

stm32/metapac: check GPIO RCC regs are always found.

2021-08-19 23:59:50 +02:00

l1

Add pwr for L1 and update RCC to new reg block

2021-09-23 14:51:16 +02:00

l4

Add MSI and PLL clock source for L4

2021-09-24 18:27:39 +02:00

wb

stm32/rcc: update for new version naming

2021-08-19 22:17:45 +02:00

wl5x

Updates

2021-09-15 12:46:20 +02:00

mod.rs

Support for STM32L1

2021-09-21 14:50:23 +02:00

types.rs

Prescaler 1 means divide by 3 on WL55

2021-06-16 16:21:16 +02:00