295 lines
10 KiB
Rust
295 lines
10 KiB
Rust
use stm32_metapac::rtc::vals::{Init, Osel, Pol};
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use super::sealed;
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use crate::pac::rtc::Rtc;
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use crate::peripherals::RTC;
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use crate::rtc::sealed::Instance;
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#[allow(dead_code)]
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#[repr(u8)]
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#[derive(Clone, Copy, Debug)]
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pub(crate) enum WakeupPrescaler {
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Div2 = 2,
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Div4 = 4,
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Div8 = 8,
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Div16 = 16,
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}
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#[cfg(any(stm32wb, stm32f4, stm32l0))]
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impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel {
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fn from(val: WakeupPrescaler) -> Self {
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use crate::pac::rtc::vals::Wucksel;
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match val {
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WakeupPrescaler::Div2 => Wucksel::DIV2,
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WakeupPrescaler::Div4 => Wucksel::DIV4,
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WakeupPrescaler::Div8 => Wucksel::DIV8,
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WakeupPrescaler::Div16 => Wucksel::DIV16,
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}
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}
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}
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#[cfg(any(stm32wb, stm32f4, stm32l0))]
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impl From<crate::pac::rtc::vals::Wucksel> for WakeupPrescaler {
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fn from(val: crate::pac::rtc::vals::Wucksel) -> Self {
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use crate::pac::rtc::vals::Wucksel;
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match val {
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Wucksel::DIV2 => WakeupPrescaler::Div2,
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Wucksel::DIV4 => WakeupPrescaler::Div4,
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Wucksel::DIV8 => WakeupPrescaler::Div8,
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Wucksel::DIV16 => WakeupPrescaler::Div16,
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_ => unreachable!(),
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}
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}
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}
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#[allow(dead_code)]
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impl WakeupPrescaler {
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pub fn compute_min(val: u32) -> Self {
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*[
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WakeupPrescaler::Div2,
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WakeupPrescaler::Div4,
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WakeupPrescaler::Div8,
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WakeupPrescaler::Div16,
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]
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.iter()
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.skip_while(|psc| **psc as u32 <= val)
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.next()
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.unwrap_or(&WakeupPrescaler::Div16)
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}
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}
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impl super::Rtc {
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#[cfg(feature = "low-power")]
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/// start the wakeup alarm and wtih a duration that is as close to but less than
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/// the requested duration, and record the instant the wakeup alarm was started
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pub(crate) fn start_wakeup_alarm(
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&self,
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requested_duration: embassy_time::Duration,
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cs: critical_section::CriticalSection,
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) {
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use embassy_time::{Duration, TICK_HZ};
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// Panic if the rcc mod knows we're not using low-power rtc
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#[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
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unsafe { crate::rcc::get_freqs() }.rtc.unwrap();
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let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64);
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let rtc_hz = Self::frequency().0 as u64;
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let rtc_ticks = requested_duration * rtc_hz / TICK_HZ;
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let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32);
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// adjust the rtc ticks to the prescaler and subtract one rtc tick
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let rtc_ticks = rtc_ticks / prescaler as u64;
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let rtc_ticks = rtc_ticks.clamp(0, (u16::MAX - 1) as u64).saturating_sub(1) as u16;
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self.write(false, |regs| {
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regs.cr().modify(|w| w.set_wute(false));
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regs.isr().modify(|w| w.set_wutf(false));
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while !regs.isr().read().wutwf() {}
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regs.cr().modify(|w| w.set_wucksel(prescaler.into()));
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regs.wutr().write(|w| w.set_wut(rtc_ticks));
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regs.cr().modify(|w| w.set_wute(true));
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regs.cr().modify(|w| w.set_wutie(true));
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});
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trace!(
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"rtc: start wakeup alarm for {} ms (psc: {}, ticks: {}) at {}",
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Duration::from_ticks(rtc_ticks as u64 * TICK_HZ * prescaler as u64 / rtc_hz).as_millis(),
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prescaler as u32,
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rtc_ticks,
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self.instant(),
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);
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assert!(self.stop_time.borrow(cs).replace(Some(self.instant())).is_none())
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}
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#[cfg(feature = "low-power")]
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/// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm`
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/// was called, otherwise none
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pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option<embassy_time::Duration> {
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use crate::interrupt::typelevel::Interrupt;
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if RTC::regs().cr().read().wute() {
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trace!("rtc: stop wakeup alarm at {}", self.instant());
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self.write(false, |regs| {
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regs.cr().modify(|w| w.set_wutie(false));
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regs.cr().modify(|w| w.set_wute(false));
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regs.isr().modify(|w| w.set_wutf(false));
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crate::pac::EXTI
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.pr(0)
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.modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
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<RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend();
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});
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}
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self.stop_time
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.borrow(cs)
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.take()
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.map(|stop_time| self.instant() - stop_time)
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}
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#[cfg(feature = "low-power")]
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pub(crate) fn enable_wakeup_line(&self) {
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use crate::interrupt::typelevel::Interrupt;
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use crate::pac::EXTI;
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<RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend();
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unsafe { <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::enable() };
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EXTI.rtsr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
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EXTI.imr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
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}
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/// Applies the RTC config
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/// It this changes the RTC clock source the time will be reset
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pub(super) fn configure(&mut self, async_psc: u8, sync_psc: u16) {
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self.write(true, |rtc| {
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rtc.cr().modify(|w| {
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#[cfg(rtc_v2f2)]
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w.set_fmt(false);
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#[cfg(not(rtc_v2f2))]
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w.set_fmt(stm32_metapac::rtc::vals::Fmt::TWENTY_FOUR_HOUR);
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w.set_osel(Osel::DISABLED);
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w.set_pol(Pol::HIGH);
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});
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rtc.prer().modify(|w| {
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w.set_prediv_s(sync_psc);
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w.set_prediv_a(async_psc);
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});
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});
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}
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/// Calibrate the clock drift.
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///
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/// `clock_drift` can be adjusted from -487.1 ppm to 488.5 ppm and is clamped to this range.
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///
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/// ### Note
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///
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/// To perform a calibration when `async_prescaler` is less then 3, `sync_prescaler`
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/// has to be reduced accordingly (see RM0351 Rev 9, sec 38.3.12).
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#[cfg(not(rtc_v2f2))]
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pub fn calibrate(&mut self, mut clock_drift: f32, period: super::RtcCalibrationCyclePeriod) {
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const RTC_CALR_MIN_PPM: f32 = -487.1;
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const RTC_CALR_MAX_PPM: f32 = 488.5;
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const RTC_CALR_RESOLUTION_PPM: f32 = 0.9537;
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if clock_drift < RTC_CALR_MIN_PPM {
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clock_drift = RTC_CALR_MIN_PPM;
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} else if clock_drift > RTC_CALR_MAX_PPM {
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clock_drift = RTC_CALR_MAX_PPM;
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}
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clock_drift = clock_drift / RTC_CALR_RESOLUTION_PPM;
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self.write(false, |rtc| {
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rtc.calr().write(|w| {
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match period {
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super::RtcCalibrationCyclePeriod::Seconds8 => {
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w.set_calw8(stm32_metapac::rtc::vals::Calw8::EIGHT_SECOND);
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}
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super::RtcCalibrationCyclePeriod::Seconds16 => {
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w.set_calw16(stm32_metapac::rtc::vals::Calw16::SIXTEEN_SECOND);
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}
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super::RtcCalibrationCyclePeriod::Seconds32 => {
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// Set neither `calw8` nor `calw16` to use 32 seconds
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}
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}
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// Extra pulses during calibration cycle period: CALP * 512 - CALM
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//
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// CALP sets whether pulses are added or omitted.
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//
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// CALM contains how many pulses (out of 512) are masked in a
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// given calibration cycle period.
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if clock_drift > 0.0 {
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// Maximum (about 512.2) rounds to 512.
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clock_drift += 0.5;
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// When the offset is positive (0 to 512), the opposite of
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// the offset (512 - offset) is masked, i.e. for the
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// maximum offset (512), 0 pulses are masked.
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w.set_calp(stm32_metapac::rtc::vals::Calp::INCREASEFREQ);
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w.set_calm(512 - clock_drift as u16);
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} else {
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// Minimum (about -510.7) rounds to -511.
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clock_drift -= 0.5;
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// When the offset is negative or zero (-511 to 0),
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// the absolute offset is masked, i.e. for the minimum
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// offset (-511), 511 pulses are masked.
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w.set_calp(stm32_metapac::rtc::vals::Calp::NOCHANGE);
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w.set_calm((clock_drift * -1.0) as u16);
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}
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});
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})
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}
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pub(super) fn write<F, R>(&self, init_mode: bool, f: F) -> R
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where
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F: FnOnce(&crate::pac::rtc::Rtc) -> R,
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{
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let r = RTC::regs();
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// Disable write protection.
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// This is safe, as we're only writin the correct and expected values.
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r.wpr().write(|w| w.set_key(0xca));
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r.wpr().write(|w| w.set_key(0x53));
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// true if initf bit indicates RTC peripheral is in init mode
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if init_mode && !r.isr().read().initf() {
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// to update calendar date/time, time format, and prescaler configuration, RTC must be in init mode
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r.isr().modify(|w| w.set_init(Init::INITMODE));
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// wait till init state entered
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// ~2 RTCCLK cycles
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while !r.isr().read().initf() {}
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}
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let result = f(&r);
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if init_mode {
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r.isr().modify(|w| w.set_init(Init::FREERUNNINGMODE)); // Exits init mode
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}
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// Re-enable write protection.
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// This is safe, as the field accepts the full range of 8-bit values.
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r.wpr().write(|w| w.set_key(0xff));
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result
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}
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}
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impl sealed::Instance for crate::peripherals::RTC {
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const BACKUP_REGISTER_COUNT: usize = 20;
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#[cfg(all(feature = "low-power", stm32f4))]
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const EXTI_WAKEUP_LINE: usize = 22;
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#[cfg(all(feature = "low-power", stm32l0))]
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const EXTI_WAKEUP_LINE: usize = 20;
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#[cfg(all(feature = "low-power", stm32f4))]
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type WakeupInterrupt = crate::interrupt::typelevel::RTC_WKUP;
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#[cfg(all(feature = "low-power", stm32l0))]
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type WakeupInterrupt = crate::interrupt::typelevel::RTC;
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fn read_backup_register(rtc: &Rtc, register: usize) -> Option<u32> {
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if register < Self::BACKUP_REGISTER_COUNT {
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Some(rtc.bkpr(register).read().bkp())
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} else {
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None
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}
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}
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fn write_backup_register(rtc: &Rtc, register: usize, value: u32) {
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if register < Self::BACKUP_REGISTER_COUNT {
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rtc.bkpr(register).write(|w| w.set_bkp(value));
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}
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}
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}
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