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84240d49ea
embassy/embassy-stm32/src/rcc
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Timo Kröger 84240d49ea stm32wl: Fix RCC 
* `MSIRGSEL = 1` was required for MSI accept the updated MSI range
* Reorder enable and clock switching to properly handle the jump from
the default 4MHz MSI to a higher MSI freuquency
2022-08-26 15:44:58 +02:00
..
f0.rs Refactor IWDG to use LSI frequency from RCC 2022-07-10 20:59:36 +03:00
f1.rs Refactor IWDG to use LSI frequency from RCC 2022-07-10 20:59:36 +03:00
f2.rs Fix f2, wl compilation 2022-07-10 21:46:14 +03:00
f3.rs Refactor IWDG to use LSI frequency from RCC 2022-07-10 20:59:36 +03:00
f4.rs Refactor IWDG to use LSI frequency from RCC 2022-07-10 20:59:36 +03:00
f7.rs Refactor IWDG to use LSI frequency from RCC 2022-07-10 20:59:36 +03:00
g0.rs embassy-stm32: Simplify time 2022-07-10 21:46:45 -05:00
g4.rs embassy-stm32: Simplify time 2022-07-10 21:46:45 -05:00
h7.rs Rename Unborrowed -> PeripheralRef, Unborrow -> Peripheral 2022-07-23 14:00:19 +02:00
l0.rs embassy-stm32: Simplify time 2022-07-10 21:46:45 -05:00
l1.rs embassy-stm32: Simplify time 2022-07-10 21:46:45 -05:00
l4.rs embassy-stm32: Simplify time 2022-07-10 21:46:45 -05:00
l5.rs embassy-stm32: Simplify time 2022-07-10 21:46:45 -05:00
mod.rs stm32: fix f100 build. 2022-06-26 23:52:38 +02:00
u5.rs stm32/rcc: fix unnecessary parentheses 2022-08-17 15:03:23 +02:00
wb.rs embassy-stm32: Simplify time 2022-07-10 21:46:45 -05:00
wl.rs stm32wl: Fix RCC 2022-08-26 15:44:58 +02:00