Piotr Esden-Tempski 858ddf6777 Added debug=2 in release profile to all examples. ...

This makes rtt output work right when using `cargo run` in release mode.

Debug was already enabled for release builds in some of the examples but
not all.

2023-07-26 18:32:40 -07:00

..

.cargo

Update probe-rs-cli -> probe-rs

2023-06-29 02:39:28 +02:00

src/bin

stm32/eth: add set_poll_interval

2023-07-15 12:02:08 -05:00

build.rs

Make interrupt module more standard.

2023-06-08 18:00:48 +02:00

Cargo.toml

Added debug=2 in release profile to all examples.

2023-07-26 18:32:40 -07:00

memory.x

Initial support for STM32F767ZI.

2021-10-26 17:33:28 +02:00