1018 lines
29 KiB
Rust
1018 lines
29 KiB
Rust
use core::convert::Infallible;
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use core::future::Future;
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use core::marker::PhantomData;
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use core::pin::Pin as FuturePin;
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use core::task::{Context, Poll};
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use embassy::waitqueue::AtomicWaker;
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_hal_common::{unborrow, unsafe_impl_unborrow};
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use crate::pac::common::{Reg, RW};
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use crate::pac::SIO;
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use crate::{interrupt, pac, peripherals, Unborrow};
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const PIN_COUNT: usize = 30;
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const NEW_AW: AtomicWaker = AtomicWaker::new();
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static INTERRUPT_WAKERS: [AtomicWaker; PIN_COUNT] = [NEW_AW; PIN_COUNT];
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/// Represents a digital input or output level.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Level {
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Low,
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High,
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}
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impl From<bool> for Level {
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fn from(val: bool) -> Self {
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match val {
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true => Self::High,
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false => Self::Low,
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}
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}
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}
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impl Into<bool> for Level {
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fn into(self) -> bool {
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match self {
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Level::Low => false,
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Level::High => true,
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}
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}
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}
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/// Represents a pull setting for an input.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Pull {
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None,
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Up,
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Down,
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}
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/// A GPIO bank with up to 32 pins.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Bank {
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Bank0 = 0,
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Qspi = 1,
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}
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pub struct Input<'d, T: Pin> {
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pin: Flex<'d, T>,
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}
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impl<'d, T: Pin> Input<'d, T> {
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#[inline]
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pub fn new(pin: impl Unborrow<Target = T> + 'd, pull: Pull) -> Self {
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let mut pin = Flex::new(pin);
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pin.set_as_input();
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pin.set_pull(pull);
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Self { pin }
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}
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#[inline]
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pub fn is_high(&self) -> bool {
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self.pin.is_high()
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}
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#[inline]
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pub fn is_low(&self) -> bool {
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self.pin.is_low()
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}
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/// Returns current pin level
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#[inline]
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pub fn get_level(&self) -> Level {
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self.pin.get_level()
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}
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pub async fn wait_for_high<'a>(&mut self) {
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self.pin.wait_for_high().await;
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}
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pub async fn wait_for_low<'a>(&mut self) {
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self.pin.wait_for_low().await;
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}
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pub async fn wait_for_rising_edge<'a>(&mut self) {
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self.pin.wait_for_rising_edge().await;
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}
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pub async fn wait_for_falling_edge<'a>(&mut self) {
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self.pin.wait_for_falling_edge().await;
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}
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pub async fn wait_for_any_edge<'a>(&mut self) {
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self.pin.wait_for_any_edge().await;
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}
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}
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/// Interrupt trigger levels.
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#[derive(Debug, Eq, PartialEq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum InterruptTrigger {
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LevelLow,
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LevelHigh,
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EdgeLow,
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EdgeHigh,
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AnyEdge,
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}
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impl InterruptTrigger {
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fn from_u32(value: u32) -> Option<InterruptTrigger> {
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match value {
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1 => Some(InterruptTrigger::LevelLow),
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2 => Some(InterruptTrigger::LevelHigh),
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3 => Some(InterruptTrigger::EdgeLow),
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4 => Some(InterruptTrigger::EdgeHigh),
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_ => None,
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}
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}
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}
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#[interrupt]
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unsafe fn IO_IRQ_BANK0() {
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let cpu = SIO.cpuid().read() as usize;
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// There are two sets of interrupt registers, one for cpu0 and one for cpu1
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// and here we are selecting the set that belongs to the currently executing
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// cpu.
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let proc_intx: pac::io::Int = pac::IO_BANK0.int_proc(cpu);
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for pin in 0..PIN_COUNT {
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// There are 4 raw interrupt status registers, PROCx_INTS0, PROCx_INTS1,
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// PROCx_INTS2, and PROCx_INTS3, and we are selecting the one that the
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// current pin belongs to.
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let intsx = proc_intx.ints(pin / 8);
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// The status register is divided into groups of four, one group for
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// each pin. Each group consists of four trigger levels LEVEL_LOW,
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// LEVEL_HIGH, EDGE_LOW, and EDGE_HIGH for each pin.
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let pin_group = (pin % 8) as usize;
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let event = (intsx.read().0 >> pin_group * 4) & 0xf as u32;
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if let Some(trigger) = InterruptTrigger::from_u32(event) {
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proc_intx.inte(pin / 8).write(|w| match trigger {
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InterruptTrigger::AnyEdge => {
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w.set_edge_high(pin_group, false);
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w.set_edge_low(pin_group, false);
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}
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InterruptTrigger::LevelHigh => {
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debug!("IO_IRQ_BANK0 pin {} LevelHigh triggered\n", pin);
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w.set_level_high(pin_group, false);
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}
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InterruptTrigger::LevelLow => {
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w.set_level_low(pin_group, false);
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}
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InterruptTrigger::EdgeHigh => {
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w.set_edge_high(pin_group, false);
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}
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InterruptTrigger::EdgeLow => {
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w.set_edge_low(pin_group, false);
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}
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});
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INTERRUPT_WAKERS[pin as usize].wake();
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}
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}
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}
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struct InputFuture<'a, T: Pin> {
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pin: &'a mut T,
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level: InterruptTrigger,
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phantom: PhantomData<&'a mut AnyPin>,
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}
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impl<'d, T: Pin> InputFuture<'d, T> {
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pub fn new(pin: &'d mut T, level: InterruptTrigger) -> Self {
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unsafe {
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let irq = interrupt::IO_IRQ_BANK0::steal();
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irq.disable();
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irq.set_priority(interrupt::Priority::P6);
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// Each INTR register is divided into 8 groups, one group for each
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// pin, and each group consists of LEVEL_LOW, LEVEL_HIGH, EDGE_LOW,
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// and EGDE_HIGH.
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let pin_group = (pin.pin() % 8) as usize;
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pin.int_proc().inte((pin.pin() / 8) as usize).write(|w| match level {
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InterruptTrigger::LevelHigh => {
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debug!("InputFuture::new enable LevelHigh for pin {} \n", pin.pin());
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w.set_level_high(pin_group, true);
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}
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InterruptTrigger::LevelLow => {
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w.set_level_low(pin_group, true);
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}
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InterruptTrigger::EdgeHigh => {
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w.set_edge_high(pin_group, true);
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}
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InterruptTrigger::EdgeLow => {
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w.set_edge_low(pin_group, true);
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}
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InterruptTrigger::AnyEdge => {
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// noop
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}
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});
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irq.enable();
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}
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Self {
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pin,
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level,
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phantom: PhantomData,
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}
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}
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}
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impl<'d, T: Pin> Future for InputFuture<'d, T> {
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type Output = ();
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fn poll(self: FuturePin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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// We need to register/re-register the waker for each poll because any
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// calls to wake will deregister the waker.
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INTERRUPT_WAKERS[self.pin.pin() as usize].register(cx.waker());
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// self.int_proc() will get the register offset for the current cpu,
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// then we want to access the interrupt enable register for our
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// pin (there are 4 of these PROC0_INTE0, PROC0_INTE1, PROC0_INTE2, and
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// PROC0_INTE3 per cpu).
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let inte: pac::io::regs::Int = unsafe { self.pin.int_proc().inte((self.pin.pin() / 8) as usize).read() };
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// The register is divided into groups of four, one group for
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// each pin. Each group consists of four trigger levels LEVEL_LOW,
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// LEVEL_HIGH, EDGE_LOW, and EDGE_HIGH for each pin.
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let pin_group = (self.pin.pin() % 8) as usize;
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// This should check the the level of the interrupt trigger level of
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// the pin and if it has been disabled that means it was done by the
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// interrupt service routine, so we then know that the event/trigger
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// happened and Poll::Ready will be returned.
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debug!("{:?} for pin {}\n", self.level, self.pin.pin());
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match self.level {
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InterruptTrigger::AnyEdge => {
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if !inte.edge_high(pin_group) && !inte.edge_low(pin_group) {
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#[rustfmt::skip]
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debug!("{:?} for pin {} was cleared, return Poll::Ready\n", self.level, self.pin.pin());
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return Poll::Ready(());
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}
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}
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InterruptTrigger::LevelHigh => {
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if !inte.level_high(pin_group) {
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#[rustfmt::skip]
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debug!("{:?} for pin {} was cleared, return Poll::Ready\n", self.level, self.pin.pin());
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return Poll::Ready(());
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}
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}
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InterruptTrigger::LevelLow => {
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if !inte.level_low(pin_group) {
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#[rustfmt::skip]
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debug!("{:?} for pin {} was cleared, return Poll::Ready\n", self.level, self.pin.pin());
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return Poll::Ready(());
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}
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}
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InterruptTrigger::EdgeHigh => {
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if !inte.edge_high(pin_group) {
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#[rustfmt::skip]
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debug!("{:?} for pin {} was cleared, return Poll::Ready\n", self.level, self.pin.pin());
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return Poll::Ready(());
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}
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}
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InterruptTrigger::EdgeLow => {
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if !inte.edge_low(pin_group) {
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#[rustfmt::skip]
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debug!("{:?} for pin {} was cleared, return Poll::Ready\n", self.level, self.pin.pin());
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return Poll::Ready(());
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}
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}
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}
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debug!("InputFuture::poll return Poll::Pending\n");
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Poll::Pending
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}
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}
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pub struct Output<'d, T: Pin> {
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pin: Flex<'d, T>,
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}
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impl<'d, T: Pin> Output<'d, T> {
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#[inline]
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pub fn new(pin: impl Unborrow<Target = T> + 'd, initial_output: Level) -> Self {
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let mut pin = Flex::new(pin);
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match initial_output {
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Level::High => pin.set_high(),
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Level::Low => pin.set_low(),
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}
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pin.set_as_output();
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Self { pin }
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}
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/// Set the output as high.
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#[inline]
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pub fn set_high(&mut self) {
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self.pin.set_high()
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}
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/// Set the output as low.
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#[inline]
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pub fn set_low(&mut self) {
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self.pin.set_low()
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}
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/// Set the output level.
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#[inline]
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pub fn set_level(&mut self, level: Level) {
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self.pin.set_level(level)
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}
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/// Is the output pin set as high?
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#[inline]
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pub fn is_set_high(&self) -> bool {
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self.pin.is_set_high()
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}
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/// Is the output pin set as low?
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#[inline]
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pub fn is_set_low(&self) -> bool {
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self.pin.is_set_low()
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}
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/// What level output is set to
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#[inline]
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pub fn get_output_level(&self) -> Level {
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self.pin.get_output_level()
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}
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/// Toggle pin output
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#[inline]
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pub fn toggle(&mut self) {
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self.pin.toggle()
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}
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}
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/// GPIO output open-drain.
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pub struct OutputOpenDrain<'d, T: Pin> {
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pin: Flex<'d, T>,
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}
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impl<'d, T: Pin> OutputOpenDrain<'d, T> {
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#[inline]
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pub fn new(pin: impl Unborrow<Target = T> + 'd, initial_output: Level) -> Self {
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let mut pin = Flex::new(pin);
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pin.set_low();
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match initial_output {
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Level::High => pin.set_as_input(),
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Level::Low => pin.set_as_output(),
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}
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Self { pin }
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}
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/// Set the output as high.
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#[inline]
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pub fn set_high(&mut self) {
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// For Open Drain High, disable the output pin.
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self.pin.set_as_input()
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}
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/// Set the output as low.
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#[inline]
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pub fn set_low(&mut self) {
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// For Open Drain Low, enable the output pin.
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self.pin.set_as_output()
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}
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/// Set the output level.
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#[inline]
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pub fn set_level(&mut self, level: Level) {
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match level {
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Level::Low => self.set_low(),
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Level::High => self.set_high(),
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}
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}
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/// Is the output level high?
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#[inline]
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pub fn is_set_high(&self) -> bool {
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!self.is_set_low()
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}
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/// Is the output level low?
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#[inline]
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pub fn is_set_low(&self) -> bool {
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self.pin.is_set_as_output()
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}
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/// What level output is set to
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#[inline]
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pub fn get_output_level(&self) -> Level {
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self.is_set_high().into()
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}
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/// Toggle pin output
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#[inline]
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pub fn toggle(&mut self) {
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self.pin.toggle_set_as_output()
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}
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}
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/// GPIO flexible pin.
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///
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/// This pin can be either an input or output pin. The output level register bit will remain
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/// set while not in output mode, so the pin's level will be 'remembered' when it is not in output
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/// mode.
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pub struct Flex<'d, T: Pin> {
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pin: T,
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phantom: PhantomData<&'d mut T>,
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}
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impl<'d, T: Pin> Flex<'d, T> {
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#[inline]
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pub fn new(pin: impl Unborrow<Target = T> + 'd) -> Self {
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unborrow!(pin);
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unsafe {
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pin.pad_ctrl().write(|w| {
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w.set_ie(true);
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});
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pin.io().ctrl().write(|w| {
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w.set_funcsel(pac::io::vals::Gpio0CtrlFuncsel::SIO_0.0);
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});
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}
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Self {
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pin,
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phantom: PhantomData,
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}
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}
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#[inline]
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fn bit(&self) -> u32 {
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1 << self.pin.pin()
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}
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/// Set the pin's pull.
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#[inline]
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pub fn set_pull(&mut self, pull: Pull) {
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unsafe {
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self.pin.pad_ctrl().write(|w| {
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w.set_ie(true);
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match pull {
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Pull::Up => w.set_pue(true),
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Pull::Down => w.set_pde(true),
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Pull::None => {}
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}
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});
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}
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}
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/// Put the pin into input mode.
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///
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/// The pull setting is left unchanged.
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#[inline]
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pub fn set_as_input(&mut self) {
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unsafe { self.pin.sio_oe().value_clr().write_value(self.bit()) }
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}
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/// Put the pin into output mode.
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///
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/// The pin level will be whatever was set before (or low by default). If you want it to begin
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/// at a specific level, call `set_high`/`set_low` on the pin first.
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#[inline]
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pub fn set_as_output(&mut self) {
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unsafe { self.pin.sio_oe().value_set().write_value(self.bit()) }
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}
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#[inline]
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fn is_set_as_output(&self) -> bool {
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unsafe { (self.pin.sio_oe().value().read() & self.bit()) != 0 }
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}
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#[inline]
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pub fn toggle_set_as_output(&mut self) {
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unsafe { self.pin.sio_oe().value_xor().write_value(self.bit()) }
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}
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#[inline]
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pub fn is_high(&self) -> bool {
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!self.is_low()
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}
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#[inline]
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pub fn is_low(&self) -> bool {
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unsafe { self.pin.sio_in().read() & self.bit() == 0 }
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}
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/// Returns current pin level
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#[inline]
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pub fn get_level(&self) -> Level {
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self.is_high().into()
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}
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/// Set the output as high.
|
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#[inline]
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pub fn set_high(&mut self) {
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unsafe { self.pin.sio_out().value_set().write_value(self.bit()) }
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}
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|
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/// Set the output as low.
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#[inline]
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pub fn set_low(&mut self) {
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unsafe { self.pin.sio_out().value_clr().write_value(self.bit()) }
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}
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|
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/// Set the output level.
|
|
#[inline]
|
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pub fn set_level(&mut self, level: Level) {
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match level {
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Level::Low => self.set_low(),
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Level::High => self.set_high(),
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}
|
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}
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|
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/// Is the output level high?
|
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#[inline]
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pub fn is_set_high(&self) -> bool {
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unsafe { (self.pin.sio_out().value().read() & self.bit()) == 0 }
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}
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|
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/// Is the output level low?
|
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#[inline]
|
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pub fn is_set_low(&self) -> bool {
|
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!self.is_set_high()
|
|
}
|
|
|
|
/// What level output is set to
|
|
#[inline]
|
|
pub fn get_output_level(&self) -> Level {
|
|
self.is_set_high().into()
|
|
}
|
|
|
|
/// Toggle pin output
|
|
#[inline]
|
|
pub fn toggle(&mut self) {
|
|
unsafe { self.pin.sio_out().value_xor().write_value(self.bit()) }
|
|
}
|
|
|
|
pub async fn wait_for_high<'a>(&mut self) {
|
|
InputFuture::new(&mut self.pin, InterruptTrigger::LevelHigh).await;
|
|
}
|
|
|
|
pub async fn wait_for_low<'a>(&mut self) {
|
|
InputFuture::new(&mut self.pin, InterruptTrigger::LevelLow).await;
|
|
}
|
|
|
|
pub async fn wait_for_rising_edge<'a>(&mut self) {
|
|
self.wait_for_low().await;
|
|
self.wait_for_high().await;
|
|
}
|
|
|
|
pub async fn wait_for_falling_edge<'a>(&mut self) {
|
|
self.wait_for_high().await;
|
|
self.wait_for_low().await;
|
|
}
|
|
|
|
pub async fn wait_for_any_edge<'a>(&mut self) {
|
|
if self.is_high() {
|
|
self.wait_for_low().await;
|
|
} else {
|
|
self.wait_for_high().await;
|
|
}
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> Drop for Flex<'d, T> {
|
|
#[inline]
|
|
fn drop(&mut self) {
|
|
unsafe {
|
|
self.pin.pad_ctrl().write(|_| {});
|
|
self.pin.io().ctrl().write(|w| {
|
|
w.set_funcsel(pac::io::vals::Gpio0CtrlFuncsel::NULL.0);
|
|
});
|
|
}
|
|
}
|
|
}
|
|
|
|
pub(crate) mod sealed {
|
|
use super::*;
|
|
|
|
pub trait Pin: Sized {
|
|
fn pin_bank(&self) -> u8;
|
|
|
|
#[inline]
|
|
fn pin(&self) -> u8 {
|
|
self.pin_bank() & 0x1f
|
|
}
|
|
|
|
#[inline]
|
|
fn bank(&self) -> Bank {
|
|
if self.pin_bank() & 0x20 == 0 {
|
|
Bank::Bank0
|
|
} else {
|
|
Bank::Qspi
|
|
}
|
|
}
|
|
|
|
fn io(&self) -> pac::io::Gpio {
|
|
let block = match self.bank() {
|
|
Bank::Bank0 => crate::pac::IO_BANK0,
|
|
Bank::Qspi => crate::pac::IO_QSPI,
|
|
};
|
|
block.gpio(self.pin() as _)
|
|
}
|
|
|
|
fn pad_ctrl(&self) -> Reg<pac::pads::regs::GpioCtrl, RW> {
|
|
let block = match self.bank() {
|
|
Bank::Bank0 => crate::pac::PADS_BANK0,
|
|
Bank::Qspi => crate::pac::PADS_QSPI,
|
|
};
|
|
block.gpio(self.pin() as _)
|
|
}
|
|
|
|
fn sio_out(&self) -> pac::sio::Gpio {
|
|
SIO.gpio_out(self.bank() as _)
|
|
}
|
|
|
|
fn sio_oe(&self) -> pac::sio::Gpio {
|
|
SIO.gpio_oe(self.bank() as _)
|
|
}
|
|
|
|
fn sio_in(&self) -> Reg<u32, RW> {
|
|
SIO.gpio_in(self.bank() as _)
|
|
}
|
|
|
|
fn int_proc(&self) -> pac::io::Int {
|
|
let io_block = match self.bank() {
|
|
Bank::Bank0 => crate::pac::IO_BANK0,
|
|
Bank::Qspi => crate::pac::IO_QSPI,
|
|
};
|
|
let proc = unsafe { SIO.cpuid().read() };
|
|
io_block.int_proc(proc as _)
|
|
}
|
|
}
|
|
}
|
|
|
|
pub trait Pin: Unborrow<Target = Self> + sealed::Pin {
|
|
/// Degrade to a generic pin struct
|
|
fn degrade(self) -> AnyPin {
|
|
AnyPin {
|
|
pin_bank: self.pin_bank(),
|
|
}
|
|
}
|
|
}
|
|
|
|
pub struct AnyPin {
|
|
pin_bank: u8,
|
|
}
|
|
unsafe_impl_unborrow!(AnyPin);
|
|
impl Pin for AnyPin {}
|
|
impl sealed::Pin for AnyPin {
|
|
fn pin_bank(&self) -> u8 {
|
|
self.pin_bank
|
|
}
|
|
}
|
|
|
|
// ==========================
|
|
|
|
macro_rules! impl_pin {
|
|
($name:ident, $bank:expr, $pin_num:expr) => {
|
|
impl Pin for peripherals::$name {}
|
|
impl sealed::Pin for peripherals::$name {
|
|
fn pin_bank(&self) -> u8 {
|
|
($bank as u8) * 32 + $pin_num
|
|
}
|
|
}
|
|
};
|
|
}
|
|
|
|
impl_pin!(PIN_0, Bank::Bank0, 0);
|
|
impl_pin!(PIN_1, Bank::Bank0, 1);
|
|
impl_pin!(PIN_2, Bank::Bank0, 2);
|
|
impl_pin!(PIN_3, Bank::Bank0, 3);
|
|
impl_pin!(PIN_4, Bank::Bank0, 4);
|
|
impl_pin!(PIN_5, Bank::Bank0, 5);
|
|
impl_pin!(PIN_6, Bank::Bank0, 6);
|
|
impl_pin!(PIN_7, Bank::Bank0, 7);
|
|
impl_pin!(PIN_8, Bank::Bank0, 8);
|
|
impl_pin!(PIN_9, Bank::Bank0, 9);
|
|
impl_pin!(PIN_10, Bank::Bank0, 10);
|
|
impl_pin!(PIN_11, Bank::Bank0, 11);
|
|
impl_pin!(PIN_12, Bank::Bank0, 12);
|
|
impl_pin!(PIN_13, Bank::Bank0, 13);
|
|
impl_pin!(PIN_14, Bank::Bank0, 14);
|
|
impl_pin!(PIN_15, Bank::Bank0, 15);
|
|
impl_pin!(PIN_16, Bank::Bank0, 16);
|
|
impl_pin!(PIN_17, Bank::Bank0, 17);
|
|
impl_pin!(PIN_18, Bank::Bank0, 18);
|
|
impl_pin!(PIN_19, Bank::Bank0, 19);
|
|
impl_pin!(PIN_20, Bank::Bank0, 20);
|
|
impl_pin!(PIN_21, Bank::Bank0, 21);
|
|
impl_pin!(PIN_22, Bank::Bank0, 22);
|
|
impl_pin!(PIN_23, Bank::Bank0, 23);
|
|
impl_pin!(PIN_24, Bank::Bank0, 24);
|
|
impl_pin!(PIN_25, Bank::Bank0, 25);
|
|
impl_pin!(PIN_26, Bank::Bank0, 26);
|
|
impl_pin!(PIN_27, Bank::Bank0, 27);
|
|
impl_pin!(PIN_28, Bank::Bank0, 28);
|
|
impl_pin!(PIN_29, Bank::Bank0, 29);
|
|
|
|
impl_pin!(PIN_QSPI_SCLK, Bank::Qspi, 0);
|
|
impl_pin!(PIN_QSPI_SS, Bank::Qspi, 1);
|
|
impl_pin!(PIN_QSPI_SD0, Bank::Qspi, 2);
|
|
impl_pin!(PIN_QSPI_SD1, Bank::Qspi, 3);
|
|
impl_pin!(PIN_QSPI_SD2, Bank::Qspi, 4);
|
|
impl_pin!(PIN_QSPI_SD3, Bank::Qspi, 5);
|
|
|
|
// ====================
|
|
|
|
mod eh02 {
|
|
use futures::FutureExt;
|
|
|
|
use super::*;
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::InputPin for Input<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::OutputPin for Output<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::StatefulOutputPin for Output<'d, T> {
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::ToggleableOutputPin for Output<'d, T> {
|
|
type Error = Infallible;
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::OutputPin for OutputOpenDrain<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::StatefulOutputPin for OutputOpenDrain<'d, T> {
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::ToggleableOutputPin for OutputOpenDrain<'d, T> {
|
|
type Error = Infallible;
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::InputPin for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::OutputPin for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::StatefulOutputPin for Flex<'d, T> {
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_02::digital::v2::ToggleableOutputPin for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
use core::convert::Infallible;
|
|
|
|
impl<'d, T: Pin> embedded_hal_async::digital::Wait for Flex<'d, T> {
|
|
type WaitForHighFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_high<'a>(&'a mut self) -> Self::WaitForHighFuture<'a> {
|
|
self.wait_for_high().map(Ok)
|
|
}
|
|
|
|
type WaitForLowFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_low<'a>(&'a mut self) -> Self::WaitForLowFuture<'a> {
|
|
self.wait_for_low().map(Ok)
|
|
}
|
|
|
|
type WaitForRisingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_rising_edge<'a>(&'a mut self) -> Self::WaitForRisingEdgeFuture<'a> {
|
|
self.wait_for_rising_edge().map(Ok)
|
|
}
|
|
|
|
type WaitForFallingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_falling_edge<'a>(&'a mut self) -> Self::WaitForFallingEdgeFuture<'a> {
|
|
self.wait_for_falling_edge().map(Ok)
|
|
}
|
|
|
|
type WaitForAnyEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_any_edge<'a>(&'a mut self) -> Self::WaitForAnyEdgeFuture<'a> {
|
|
self.wait_for_any_edge().map(Ok)
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_async::digital::Wait for Input<'d, T> {
|
|
type WaitForHighFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_high<'a>(&'a mut self) -> Self::WaitForHighFuture<'a> {
|
|
self.wait_for_high().map(Ok)
|
|
}
|
|
|
|
type WaitForLowFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_low<'a>(&'a mut self) -> Self::WaitForLowFuture<'a> {
|
|
self.wait_for_low().map(Ok)
|
|
}
|
|
|
|
type WaitForRisingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_rising_edge<'a>(&'a mut self) -> Self::WaitForRisingEdgeFuture<'a> {
|
|
self.wait_for_rising_edge().map(Ok)
|
|
}
|
|
|
|
type WaitForFallingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_falling_edge<'a>(&'a mut self) -> Self::WaitForFallingEdgeFuture<'a> {
|
|
self.wait_for_falling_edge().map(Ok)
|
|
}
|
|
|
|
type WaitForAnyEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
|
fn wait_for_any_edge<'a>(&'a mut self) -> Self::WaitForAnyEdgeFuture<'a> {
|
|
self.wait_for_any_edge().map(Ok)
|
|
}
|
|
}
|
|
}
|
|
|
|
#[cfg(feature = "unstable-traits")]
|
|
mod eh1 {
|
|
use super::*;
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::ErrorType for Input<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::InputPin for Input<'d, T> {
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::ErrorType for Output<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::OutputPin for Output<'d, T> {
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::StatefulOutputPin for Output<'d, T> {
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::ToggleableOutputPin for Output<'d, T> {
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::ErrorType for OutputOpenDrain<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::OutputPin for OutputOpenDrain<'d, T> {
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::StatefulOutputPin for OutputOpenDrain<'d, T> {
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::ToggleableOutputPin for OutputOpenDrain<'d, T> {
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::ErrorType for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::InputPin for Flex<'d, T> {
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::OutputPin for Flex<'d, T> {
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::StatefulOutputPin for Flex<'d, T> {
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> embedded_hal_1::digital::blocking::ToggleableOutputPin for Flex<'d, T> {
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
}
|