304 lines
10 KiB
Rust
304 lines
10 KiB
Rust
use core::cell::Cell;
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use core::sync::atomic::{compiler_fence, AtomicU32, AtomicU8, Ordering};
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use core::{mem, ptr};
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use critical_section::CriticalSection;
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use embassy::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy::blocking_mutex::CriticalSectionMutex as Mutex;
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use embassy::interrupt::{Interrupt, InterruptExt};
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use embassy::time::driver::{AlarmHandle, Driver};
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use crate::interrupt;
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use crate::pac;
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fn rtc() -> &'static pac::rtc0::RegisterBlock {
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unsafe { &*pac::RTC1::ptr() }
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}
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/// Calculate the timestamp from the period count and the tick count.
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///
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/// The RTC counter is 24 bit. Ticking at 32768hz, it overflows every ~8 minutes. This is
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/// too short. We must make it "never" overflow.
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///
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/// The obvious way would be to count overflow periods. Every time the counter overflows,
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/// increase a `periods` variable. `now()` simply does `periods << 24 + counter`. So, the logic
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/// around an overflow would look like this:
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///
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/// ```not_rust
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/// periods = 1, counter = 0xFF_FFFE --> now = 0x1FF_FFFE
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/// periods = 1, counter = 0xFF_FFFF --> now = 0x1FF_FFFF
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/// **OVERFLOW**
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/// periods = 2, counter = 0x00_0000 --> now = 0x200_0000
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/// periods = 2, counter = 0x00_0001 --> now = 0x200_0001
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/// ```
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///
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/// The problem is this is vulnerable to race conditions if `now()` runs at the exact time an
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/// overflow happens.
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///
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/// If `now()` reads `periods` first and `counter` later, and overflow happens between the reads,
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/// it would return a wrong value:
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///
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/// ```not_rust
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/// periods = 1 (OLD), counter = 0x00_0000 (NEW) --> now = 0x100_0000 -> WRONG
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/// ```
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///
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/// It fails similarly if it reads `counter` first and `periods` second.
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///
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/// To fix this, we define a "period" to be 2^23 ticks (instead of 2^24). One "overflow cycle" is 2 periods.
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///
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/// - `period` is incremented on overflow (at counter value 0)
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/// - `period` is incremented "midway" between overflows (at counter value 0x80_0000)
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///
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/// Therefore, when `period` is even, counter is in 0..0x7f_ffff. When odd, counter is in 0x80_0000..0xFF_FFFF
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/// This allows for now() to return the correct value even if it races an overflow.
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///
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/// To get `now()`, `period` is read first, then `counter` is read. If the counter value matches
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/// the expected range for the `period` parity, we're done. If it doesn't, this means that
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/// a new period start has raced us between reading `period` and `counter`, so we assume the `counter` value
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/// corresponds to the next period.
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///
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/// `period` is a 32bit integer, so It overflows on 2^32 * 2^23 / 32768 seconds of uptime, which is 34865
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/// years. For comparison, flash memory like the one containing your firmware is usually rated to retain
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/// data for only 10-20 years. 34865 years is long enough!
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fn calc_now(period: u32, counter: u32) -> u64 {
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((period as u64) << 23) + ((counter ^ ((period & 1) << 23)) as u64)
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}
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fn compare_n(n: usize) -> u32 {
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1 << (n + 16)
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}
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#[cfg(tests)]
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mod test {
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use super::*;
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#[test]
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fn test_calc_now() {
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assert_eq!(calc_now(0, 0x000000), 0x0_000000);
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assert_eq!(calc_now(0, 0x000001), 0x0_000001);
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assert_eq!(calc_now(0, 0x7FFFFF), 0x0_7FFFFF);
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assert_eq!(calc_now(1, 0x7FFFFF), 0x1_7FFFFF);
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assert_eq!(calc_now(0, 0x800000), 0x0_800000);
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assert_eq!(calc_now(1, 0x800000), 0x0_800000);
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assert_eq!(calc_now(1, 0x800001), 0x0_800001);
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assert_eq!(calc_now(1, 0xFFFFFF), 0x0_FFFFFF);
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assert_eq!(calc_now(2, 0xFFFFFF), 0x1_FFFFFF);
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assert_eq!(calc_now(1, 0x000000), 0x1_000000);
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assert_eq!(calc_now(2, 0x000000), 0x1_000000);
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}
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}
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struct AlarmState {
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timestamp: Cell<u64>,
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// This is really a Option<(fn(*mut ()), *mut ())>
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// but fn pointers aren't allowed in const yet
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callback: Cell<*const ()>,
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ctx: Cell<*mut ()>,
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}
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unsafe impl Send for AlarmState {}
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impl AlarmState {
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const fn new() -> Self {
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Self {
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timestamp: Cell::new(u64::MAX),
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callback: Cell::new(ptr::null()),
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ctx: Cell::new(ptr::null_mut()),
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}
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}
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}
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const ALARM_COUNT: usize = 3;
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struct RtcDriver {
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/// Number of 2^23 periods elapsed since boot.
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period: AtomicU32,
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alarm_count: AtomicU8,
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/// Timestamp at which to fire alarm. u64::MAX if no alarm is scheduled.
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alarms: Mutex<[AlarmState; ALARM_COUNT]>,
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}
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const ALARM_STATE_NEW: AlarmState = AlarmState::new();
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embassy::time_driver_impl!(static DRIVER: RtcDriver = RtcDriver {
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period: AtomicU32::new(0),
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alarm_count: AtomicU8::new(0),
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alarms: Mutex::const_new(CriticalSectionRawMutex::new(), [ALARM_STATE_NEW; ALARM_COUNT]),
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});
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impl RtcDriver {
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fn init(&'static self, irq_prio: crate::interrupt::Priority) {
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let r = rtc();
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r.cc[3].write(|w| unsafe { w.bits(0x800000) });
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r.intenset.write(|w| {
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let w = w.ovrflw().set();
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let w = w.compare3().set();
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w
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});
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r.tasks_clear.write(|w| unsafe { w.bits(1) });
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r.tasks_start.write(|w| unsafe { w.bits(1) });
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// Wait for clear
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while r.counter.read().bits() != 0 {}
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let irq = unsafe { interrupt::RTC1::steal() };
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irq.set_priority(irq_prio);
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irq.enable();
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}
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fn on_interrupt(&self) {
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let r = rtc();
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if r.events_ovrflw.read().bits() == 1 {
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r.events_ovrflw.write(|w| w);
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self.next_period();
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}
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if r.events_compare[3].read().bits() == 1 {
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r.events_compare[3].write(|w| w);
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self.next_period();
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}
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for n in 0..ALARM_COUNT {
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if r.events_compare[n].read().bits() == 1 {
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r.events_compare[n].write(|w| w);
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critical_section::with(|cs| {
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self.trigger_alarm(n, cs);
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})
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}
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}
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}
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fn next_period(&self) {
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critical_section::with(|cs| {
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let r = rtc();
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let period = self.period.fetch_add(1, Ordering::Relaxed) + 1;
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let t = (period as u64) << 23;
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for n in 0..ALARM_COUNT {
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let alarm = &self.alarms.borrow(cs)[n];
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let at = alarm.timestamp.get();
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if at < t + 0xc00000 {
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// just enable it. `set_alarm` has already set the correct CC val.
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r.intenset.write(|w| unsafe { w.bits(compare_n(n)) });
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}
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}
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})
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}
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fn get_alarm<'a>(&'a self, cs: CriticalSection<'a>, alarm: AlarmHandle) -> &'a AlarmState {
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// safety: we're allowed to assume the AlarmState is created by us, and
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// we never create one that's out of bounds.
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unsafe { self.alarms.borrow(cs).get_unchecked(alarm.id() as usize) }
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}
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fn trigger_alarm(&self, n: usize, cs: CriticalSection) {
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let r = rtc();
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r.intenclr.write(|w| unsafe { w.bits(compare_n(n)) });
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let alarm = &self.alarms.borrow(cs)[n];
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alarm.timestamp.set(u64::MAX);
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// Call after clearing alarm, so the callback can set another alarm.
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// safety:
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// - we can ignore the possiblity of `f` being unset (null) because of the safety contract of `allocate_alarm`.
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// - other than that we only store valid function pointers into alarm.callback
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let f: fn(*mut ()) = unsafe { mem::transmute(alarm.callback.get()) };
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f(alarm.ctx.get());
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}
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}
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impl Driver for RtcDriver {
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fn now(&self) -> u64 {
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// `period` MUST be read before `counter`, see comment at the top for details.
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let period = self.period.load(Ordering::Relaxed);
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compiler_fence(Ordering::Acquire);
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let counter = rtc().counter.read().bits();
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calc_now(period, counter)
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}
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unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
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let id = self
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.alarm_count
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.fetch_update(Ordering::AcqRel, Ordering::Acquire, |x| {
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if x < ALARM_COUNT as u8 {
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Some(x + 1)
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} else {
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None
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}
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});
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match id {
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Ok(id) => Some(AlarmHandle::new(id)),
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Err(_) => None,
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}
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}
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fn set_alarm_callback(&self, alarm: AlarmHandle, callback: fn(*mut ()), ctx: *mut ()) {
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critical_section::with(|cs| {
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let alarm = self.get_alarm(cs, alarm);
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alarm.callback.set(callback as *const ());
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alarm.ctx.set(ctx);
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})
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}
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fn set_alarm(&self, alarm: AlarmHandle, timestamp: u64) {
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critical_section::with(|cs| {
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let n = alarm.id() as _;
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let alarm = self.get_alarm(cs, alarm);
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alarm.timestamp.set(timestamp);
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let t = self.now();
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// If alarm timestamp has passed, trigger it instantly.
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if timestamp <= t {
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self.trigger_alarm(n, cs);
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return;
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}
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let r = rtc();
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// If it hasn't triggered yet, setup it in the compare channel.
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// Write the CC value regardless of whether we're going to enable it now or not.
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// This way, when we enable it later, the right value is already set.
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// nrf52 docs say:
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// If the COUNTER is N, writing N or N+1 to a CC register may not trigger a COMPARE event.
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// To workaround this, we never write a timestamp smaller than N+3.
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// N+2 is not safe because rtc can tick from N to N+1 between calling now() and writing cc.
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//
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// It is impossible for rtc to tick more than once because
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// - this code takes less time than 1 tick
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// - it runs with interrupts disabled so nothing else can preempt it.
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//
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// This means that an alarm can be delayed for up to 2 ticks (from t+1 to t+3), but this is allowed
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// by the Alarm trait contract. What's not allowed is triggering alarms *before* their scheduled time,
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// and we don't do that here.
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let safe_timestamp = timestamp.max(t + 3);
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r.cc[n].write(|w| unsafe { w.bits(safe_timestamp as u32 & 0xFFFFFF) });
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let diff = timestamp - t;
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if diff < 0xc00000 {
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r.intenset.write(|w| unsafe { w.bits(compare_n(n)) });
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} else {
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// If it's too far in the future, don't setup the compare channel yet.
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// It will be setup later by `next_period`.
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r.intenclr.write(|w| unsafe { w.bits(compare_n(n)) });
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}
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})
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}
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}
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#[interrupt]
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fn RTC1() {
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DRIVER.on_interrupt()
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}
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pub(crate) fn init(irq_prio: crate::interrupt::Priority) {
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DRIVER.init(irq_prio)
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}
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