71 lines
2.0 KiB
Rust
71 lines
2.0 KiB
Rust
#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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use cortex_m_rt::entry;
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use defmt::*;
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use embassy_stm32::dac::{DacCh1, DacChannel, Value};
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::Config;
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use {defmt_rtt as _, panic_probe as _};
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#[entry]
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fn main() -> ! {
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info!("Hello World, dude!");
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let mut config = Config::default();
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{
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use embassy_stm32::rcc::*;
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config.rcc.hsi = Some(HSIPrescaler::DIV1);
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config.rcc.csi = true;
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config.rcc.pll1 = Some(Pll {
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source: PllSource::HSI,
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prediv: PllPreDiv::DIV4,
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mul: PllMul::MUL50,
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divp: Some(PllDiv::DIV2),
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divq: Some(PllDiv::DIV8), // 100mhz
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divr: None,
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});
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config.rcc.pll2 = Some(Pll {
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source: PllSource::HSI,
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prediv: PllPreDiv::DIV4,
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mul: PllMul::MUL50,
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divp: Some(PllDiv::DIV8), // 100mhz
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divq: None,
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divr: None,
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});
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config.rcc.sys = Sysclk::PLL1_P; // 400 Mhz
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config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz
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config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.voltage_scale = VoltageScale::Scale1;
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config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
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}
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let p = embassy_stm32::init(config);
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let mut dac = DacCh1::new(p.DAC1, NoDma, p.PA4);
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unwrap!(dac.set_trigger_enable(false));
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loop {
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for v in 0..=255 {
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unwrap!(dac.set(Value::Bit8(to_sine_wave(v))));
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}
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}
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}
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use micromath::F32Ext;
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fn to_sine_wave(v: u8) -> u8 {
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if v >= 128 {
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// top half
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let r = 3.14 * ((v - 128) as f32 / 128.0);
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(r.sin() * 128.0 + 127.0) as u8
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} else {
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// bottom half
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let r = 3.14 + 3.14 * (v as f32 / 128.0);
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(r.sin() * 128.0 + 127.0) as u8
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}
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}
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