55ff397c0c
This refactoring of the chip specific bootloader creates the internal boot instance and aligned buffer in the prepare stage, so that they are automatically dropped after. This unlocks a use case where peripherals owning the flash need to be Drop'ed before load() happens.
53 lines
1.4 KiB
Rust
53 lines
1.4 KiB
Rust
#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use cortex_m_rt::{entry, exception};
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#[cfg(feature = "defmt")]
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use defmt_rtt as _;
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use embassy_boot_stm32::*;
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use embassy_stm32::flash::{Flash, BANK1_REGION};
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use embassy_sync::blocking_mutex::Mutex;
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#[entry]
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fn main() -> ! {
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let p = embassy_stm32::init(Default::default());
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// Uncomment this if you are debugging the bootloader with debugger/RTT attached,
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// as it prevents a hard fault when accessing flash 'too early' after boot.
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/*
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for i in 0..10000000 {
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cortex_m::asm::nop();
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}
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*/
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let layout = Flash::new_blocking(p.FLASH).into_blocking_regions();
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let flash = Mutex::new(RefCell::new(layout.bank1_region));
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let config = BootLoaderConfig::from_linkerfile_blocking(&flash);
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let active_offset = config.active.offset();
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let bl = BootLoader::prepare::<_, _, _, 2048>(config);
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unsafe { bl.load(BANK1_REGION.base + active_offset) }
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}
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#[no_mangle]
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#[cfg_attr(target_os = "none", link_section = ".HardFault.user")]
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unsafe extern "C" fn HardFault() {
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cortex_m::peripheral::SCB::sys_reset();
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}
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#[exception]
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unsafe fn DefaultHandler(_: i16) -> ! {
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const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32;
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let irqn = core::ptr::read_volatile(SCB_ICSR) as u8 as i16 - 16;
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panic!("DefaultHandler #{:?}", irqn);
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}
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#[panic_handler]
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fn panic(_info: &core::panic::PanicInfo) -> ! {
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cortex_m::asm::udf();
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}
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