651eec0242
By passing WDT config around we can control it more easily and promote sharing it between files.
54 lines
1.4 KiB
Rust
54 lines
1.4 KiB
Rust
#![no_std]
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#![no_main]
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use cortex_m_rt::{entry, exception};
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#[cfg(feature = "defmt")]
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use defmt_rtt as _;
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use embassy_boot_nrf::*;
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use embassy_nrf::nvmc::Nvmc;
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use embassy_nrf::wdt;
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#[entry]
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fn main() -> ! {
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let p = embassy_nrf::init(Default::default());
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// Uncomment this if you are debugging the bootloader with debugger/RTT attached,
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// as it prevents a hard fault when accessing flash 'too early' after boot.
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/*
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for i in 0..10000000 {
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cortex_m::asm::nop();
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}
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*/
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let mut bl = BootLoader::default();
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let mut wdt_config = wdt::Config::default();
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wdt_config.timeout_ticks = 32768 * 5; // timeout seconds
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wdt_config.run_during_sleep = true;
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wdt_config.run_during_debug_halt = false;
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let start = bl.prepare(&mut SingleFlashConfig::new(&mut BootFlash::<_, 4096>::new(
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WatchdogFlash::start(Nvmc::new(p.NVMC), p.WDT, wdt_config),
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)));
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unsafe { bl.load(start) }
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}
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#[no_mangle]
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#[cfg_attr(target_os = "none", link_section = ".HardFault.user")]
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unsafe extern "C" fn HardFault() {
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cortex_m::peripheral::SCB::sys_reset();
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}
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#[exception]
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unsafe fn DefaultHandler(_: i16) -> ! {
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const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32;
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let irqn = core::ptr::read_volatile(SCB_ICSR) as u8 as i16 - 16;
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panic!("DefaultHandler #{:?}", irqn);
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}
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#[panic_handler]
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fn panic(_info: &core::panic::PanicInfo) -> ! {
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cortex_m::asm::udf();
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}
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