embassy/embassy-stm32
bors[bot] d9c773f475
Merge #1014
1014: Add memory barriers to H7 flash driver to mitigate PGSERR errors r=lulf a=matoushybl

The stm32h7xx-hal uses only the ordering barrier, while the CubeMX uses the DSB and ISB instructions, to be on the safe side, both are used here.

Without the barrier, the PG bit is not set, when the writes are being done, resulting in an error.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-10-19 07:29:12 +00:00
..
src Add memory barriers to H7 flash driver to mitigate PGSERR errors 2022-10-18 22:42:02 +02:00
build.rs implement support for LPUART 2022-08-19 12:05:19 +02:00
Cargo.toml Enable defmt in embassy-hal-common 2022-10-18 22:48:43 +02:00