This has the potential to not be random, but it should not be an issue if default clock settings are used.
169 lines
3.3 KiB
Rust
169 lines
3.3 KiB
Rust
#![no_std]
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#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
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#![cfg_attr(feature = "nightly", allow(incomplete_features))]
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// This mod MUST go first, so that the others see its macros.
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pub(crate) mod fmt;
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mod intrinsics;
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pub mod adc;
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pub mod dma;
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pub mod gpio;
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pub mod i2c;
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pub mod interrupt;
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pub mod rom_data;
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pub mod rtc;
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pub mod spi;
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#[cfg(feature = "time-driver")]
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pub mod timer;
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pub mod uart;
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#[cfg(feature = "nightly")]
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pub mod usb;
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pub mod clocks;
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pub mod flash;
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mod reset;
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// Reexports
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pub use embassy_cortex_m::executor;
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pub use embassy_cortex_m::interrupt::_export::interrupt;
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pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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#[cfg(feature = "unstable-pac")]
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pub use rp2040_pac2 as pac;
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#[cfg(not(feature = "unstable-pac"))]
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pub(crate) use rp2040_pac2 as pac;
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embassy_hal_common::peripherals! {
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PIN_0,
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PIN_1,
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PIN_2,
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PIN_3,
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PIN_4,
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PIN_5,
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PIN_6,
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PIN_7,
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PIN_8,
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PIN_9,
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PIN_10,
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PIN_11,
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PIN_12,
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PIN_13,
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PIN_14,
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PIN_15,
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PIN_16,
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PIN_17,
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PIN_18,
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PIN_19,
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PIN_20,
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PIN_21,
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PIN_22,
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PIN_23,
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PIN_24,
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PIN_25,
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PIN_26,
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PIN_27,
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PIN_28,
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PIN_29,
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PIN_QSPI_SCLK,
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PIN_QSPI_SS,
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PIN_QSPI_SD0,
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PIN_QSPI_SD1,
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PIN_QSPI_SD2,
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PIN_QSPI_SD3,
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UART0,
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UART1,
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SPI0,
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SPI1,
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I2C0,
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I2C1,
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DMA_CH0,
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DMA_CH1,
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DMA_CH2,
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DMA_CH3,
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DMA_CH4,
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DMA_CH5,
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DMA_CH6,
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DMA_CH7,
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DMA_CH8,
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DMA_CH9,
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DMA_CH10,
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DMA_CH11,
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USB,
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RTC,
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FLASH,
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ADC,
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}
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#[link_section = ".boot2"]
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#[used]
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static BOOT2: [u8; 256] = *include_bytes!("boot2.bin");
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pub mod config {
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#[non_exhaustive]
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pub struct Config {}
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impl Default for Config {
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fn default() -> Self {
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Self {}
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}
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}
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}
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pub fn init(_config: config::Config) -> Peripherals {
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// Do this first, so that it panics if user is calling `init` a second time
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// before doing anything important.
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let peripherals = Peripherals::take();
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unsafe {
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clocks::init();
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#[cfg(feature = "time-driver")]
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timer::init();
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dma::init();
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}
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peripherals
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}
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/// Extension trait for PAC regs, adding atomic xor/bitset/bitclear writes.
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trait RegExt<T: Copy> {
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unsafe fn write_xor<R>(&self, f: impl FnOnce(&mut T) -> R) -> R;
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unsafe fn write_set<R>(&self, f: impl FnOnce(&mut T) -> R) -> R;
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unsafe fn write_clear<R>(&self, f: impl FnOnce(&mut T) -> R) -> R;
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}
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impl<T: Default + Copy, A: pac::common::Write> RegExt<T> for pac::common::Reg<T, A> {
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unsafe fn write_xor<R>(&self, f: impl FnOnce(&mut T) -> R) -> R {
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let mut val = Default::default();
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let res = f(&mut val);
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let ptr = (self.ptr() as *mut u8).add(0x1000) as *mut T;
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ptr.write_volatile(val);
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res
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}
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unsafe fn write_set<R>(&self, f: impl FnOnce(&mut T) -> R) -> R {
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let mut val = Default::default();
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let res = f(&mut val);
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let ptr = (self.ptr() as *mut u8).add(0x2000) as *mut T;
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ptr.write_volatile(val);
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res
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}
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unsafe fn write_clear<R>(&self, f: impl FnOnce(&mut T) -> R) -> R {
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let mut val = Default::default();
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let res = f(&mut val);
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let ptr = (self.ptr() as *mut u8).add(0x3000) as *mut T;
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ptr.write_volatile(val);
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res
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}
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}
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