197 lines
3.5 KiB
Rust
197 lines
3.5 KiB
Rust
pub use nrf52820_pac as pac;
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/// The maximum buffer size that the EasyDMA can send/recv in one operation.
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pub const EASY_DMA_SIZE: usize = (1 << 15) - 1;
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pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
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embassy_hal_common::peripherals! {
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// RTC
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RTC0,
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RTC1,
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// WDT
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WDT,
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// RNG
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RNG,
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// UARTE
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UARTE0,
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// SPI/TWI
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TWISPI0,
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TWISPI1,
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// SAADC
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SAADC,
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// TIMER
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TIMER0,
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TIMER1,
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TIMER2,
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TIMER3,
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// GPIOTE
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GPIOTE_CH0,
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GPIOTE_CH1,
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GPIOTE_CH2,
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GPIOTE_CH3,
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GPIOTE_CH4,
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GPIOTE_CH5,
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GPIOTE_CH6,
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GPIOTE_CH7,
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// PPI
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PPI_CH0,
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PPI_CH1,
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PPI_CH2,
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PPI_CH3,
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PPI_CH4,
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PPI_CH5,
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PPI_CH6,
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PPI_CH7,
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PPI_CH8,
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PPI_CH9,
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PPI_CH10,
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PPI_CH11,
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PPI_CH12,
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PPI_CH13,
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PPI_CH14,
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PPI_CH15,
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PPI_CH16,
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PPI_CH17,
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PPI_CH18,
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PPI_CH19,
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PPI_CH20,
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PPI_CH21,
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PPI_CH22,
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PPI_CH23,
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PPI_CH24,
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PPI_CH25,
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PPI_CH26,
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PPI_CH27,
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PPI_CH28,
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PPI_CH29,
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PPI_CH30,
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PPI_CH31,
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PPI_GROUP0,
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PPI_GROUP1,
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PPI_GROUP2,
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PPI_GROUP3,
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PPI_GROUP4,
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PPI_GROUP5,
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// GPIO port 0
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P0_00,
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P0_01,
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P0_02,
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P0_03,
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P0_04,
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P0_05,
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P0_06,
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P0_07,
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P0_08,
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P0_09,
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P0_10,
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P0_11,
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P0_12,
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P0_13,
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P0_14,
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P0_15,
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P0_16,
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P0_17,
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P0_18,
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P0_19,
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P0_20,
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P0_21,
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P0_22,
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P0_23,
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P0_24,
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P0_25,
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P0_26,
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P0_27,
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P0_28,
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P0_29,
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P0_30,
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P0_31,
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}
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impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
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impl_spim!(TWISPI0, SPIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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impl_spim!(TWISPI1, SPIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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impl_twim!(TWISPI0, TWIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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impl_twim!(TWISPI1, TWIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER3, TIMER3, TIMER3, extended);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_02, 0, 2);
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impl_pin!(P0_03, 0, 3);
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impl_pin!(P0_04, 0, 4);
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impl_pin!(P0_05, 0, 5);
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impl_pin!(P0_06, 0, 6);
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impl_pin!(P0_07, 0, 7);
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impl_pin!(P0_08, 0, 8);
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impl_pin!(P0_09, 0, 9);
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impl_pin!(P0_10, 0, 10);
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impl_pin!(P0_11, 0, 11);
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impl_pin!(P0_12, 0, 12);
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impl_pin!(P0_13, 0, 13);
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impl_pin!(P0_14, 0, 14);
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impl_pin!(P0_15, 0, 15);
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impl_pin!(P0_16, 0, 16);
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impl_pin!(P0_17, 0, 17);
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impl_pin!(P0_18, 0, 18);
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impl_pin!(P0_19, 0, 19);
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impl_pin!(P0_20, 0, 20);
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impl_pin!(P0_21, 0, 21);
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impl_pin!(P0_22, 0, 22);
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impl_pin!(P0_23, 0, 23);
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impl_pin!(P0_24, 0, 24);
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impl_pin!(P0_25, 0, 25);
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impl_pin!(P0_26, 0, 26);
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impl_pin!(P0_27, 0, 27);
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impl_pin!(P0_28, 0, 28);
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impl_pin!(P0_29, 0, 29);
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impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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declare!(GPIOTE);
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declare!(TIMER0);
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declare!(TIMER1);
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declare!(TIMER2);
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declare!(RTC0);
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declare!(TEMP);
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declare!(RNG);
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declare!(ECB);
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declare!(CCM_AAR);
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declare!(WDT);
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declare!(RTC1);
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declare!(QDEC);
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declare!(COMP);
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declare!(SWI0_EGU0);
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declare!(SWI1_EGU1);
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declare!(SWI2_EGU2);
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declare!(SWI3_EGU3);
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declare!(SWI4_EGU4);
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declare!(SWI5_EGU5);
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declare!(TIMER3);
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declare!(USBD);
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}
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