bors[bot] f0f92909c1 Merge #1227 ...

1227: stm32/dma: fix spurious transfer complete interrupts r=Dirbaio a=pattop

DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>

2023-02-23 15:44:43 +00:00

..

src

Merge #1227

2023-02-23 15:44:43 +00:00

build.rs

Update stm32-data.

2023-01-11 17:51:30 +01:00

Cargo.toml

stm32: doc all chips.

2023-02-13 03:02:12 +01:00