2021-10-11 01:22:01 +02:00
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#![macro_use]
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2021-03-24 18:33:17 +01:00
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use core::marker::PhantomData;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::Poll;
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2021-09-01 23:54:26 +02:00
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use embassy::interrupt::InterruptExt;
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2021-09-11 01:53:53 +02:00
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use embassy::util::Unborrow;
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use embassy::waitqueue::AtomicWaker;
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2021-07-29 13:44:51 +02:00
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use embassy_hal_common::unborrow;
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2021-03-24 18:33:17 +01:00
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use futures::future::poll_fn;
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2021-04-14 19:59:52 +02:00
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use crate::interrupt;
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2021-10-12 02:24:26 +02:00
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use crate::ppi::Task;
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2021-04-14 19:59:52 +02:00
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use crate::{pac, peripherals};
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2021-03-24 18:33:17 +01:00
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use pac::{saadc, SAADC};
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2021-10-13 22:01:49 +02:00
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// We treat the positive and negative channels with the same enum values to keep our type tidy and given they are the same
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pub(crate) use saadc::ch::pselp::PSELP_A as InputChannel;
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2021-03-24 18:33:17 +01:00
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pub use saadc::{
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2021-10-13 22:01:49 +02:00
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ch::config::{GAIN_A as Gain, REFSEL_A as Reference, RESP_A as Resistor, TACQ_A as Time},
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2021-03-24 18:33:17 +01:00
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oversample::OVERSAMPLE_A as Oversample,
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resolution::VAL_A as Resolution,
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};
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {}
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/// One-shot saadc. Continuous sample mode TODO.
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2021-10-12 02:24:26 +02:00
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pub struct Saadc<'d, const N: usize> {
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2021-05-22 15:42:14 +02:00
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phantom: PhantomData<&'d mut peripherals::SAADC>,
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2021-03-24 18:33:17 +01:00
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}
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2021-09-01 23:54:26 +02:00
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static WAKER: AtomicWaker = AtomicWaker::new();
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2021-03-24 18:33:17 +01:00
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/// Used to configure the SAADC peripheral.
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///
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/// See the `Default` impl for suitable default values.
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2021-10-07 09:00:03 +02:00
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#[non_exhaustive]
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2021-03-24 18:33:17 +01:00
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pub struct Config {
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/// Output resolution in bits.
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pub resolution: Resolution,
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/// Average 2^`oversample` input samples before transferring the result into memory.
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pub oversample: Oversample,
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2021-10-07 09:00:03 +02:00
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}
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impl Default for Config {
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/// Default configuration for single channel sampling.
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fn default() -> Self {
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Self {
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resolution: Resolution::_12BIT,
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2021-10-07 09:00:03 +02:00
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oversample: Oversample::BYPASS,
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}
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}
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}
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/// Used to configure an individual SAADC peripheral channel.
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///
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/// See the `Default` impl for suitable default values.
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#[non_exhaustive]
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pub struct ChannelConfig<'d> {
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2021-03-24 18:33:17 +01:00
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/// Reference voltage of the SAADC input.
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pub reference: Reference,
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/// Gain used to control the effective input range of the SAADC.
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pub gain: Gain,
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/// Positive channel resistor control.
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pub resistor: Resistor,
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/// Acquisition time in microseconds.
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pub time: Time,
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2021-10-07 09:00:03 +02:00
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/// Positive channel to sample
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2021-10-11 00:38:35 +02:00
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p_channel: InputChannel,
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/// An optional negative channel to sample
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2021-10-11 00:38:35 +02:00
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n_channel: Option<InputChannel>,
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2021-10-10 23:52:45 +02:00
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phantom: PhantomData<&'d ()>,
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2021-03-24 18:33:17 +01:00
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}
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2021-10-24 00:53:31 +02:00
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/// A dummy `Input` pin implementation for SAADC peripheral sampling from the
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/// internal voltage.
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pub struct VddInput;
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unsafe impl Unborrow for VddInput {
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type Target = VddInput;
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unsafe fn unborrow(self) -> Self::Target {
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self
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}
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}
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impl sealed::Input for VddInput {
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#[cfg(not(feature = "nrf9160"))]
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fn channel(&self) -> InputChannel {
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InputChannel::VDD
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}
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#[cfg(feature = "nrf9160")]
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fn channel(&self) -> InputChannel {
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InputChannel::VDDGPIO
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}
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}
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impl Input for VddInput {}
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2021-10-10 23:52:45 +02:00
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impl<'d> ChannelConfig<'d> {
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2021-10-07 09:00:03 +02:00
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/// Default configuration for single ended channel sampling.
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2021-10-11 00:38:35 +02:00
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pub fn single_ended(input: impl Unborrow<Target = impl Input> + 'd) -> Self {
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unborrow!(input);
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Self {
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reference: Reference::INTERNAL,
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gain: Gain::GAIN1_6,
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resistor: Resistor::BYPASS,
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time: Time::_10US,
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2021-10-11 00:38:35 +02:00
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p_channel: input.channel(),
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2021-10-07 09:00:03 +02:00
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n_channel: None,
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2021-10-10 23:52:45 +02:00
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phantom: PhantomData,
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2021-10-07 09:00:03 +02:00
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}
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}
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/// Default configuration for differential channel sampling.
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pub fn differential(
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2021-10-11 00:38:35 +02:00
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p_input: impl Unborrow<Target = impl Input> + 'd,
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n_input: impl Unborrow<Target = impl Input> + 'd,
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2021-10-07 09:00:03 +02:00
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) -> Self {
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unborrow!(p_input, n_input);
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2021-03-24 18:33:17 +01:00
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Self {
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2021-10-15 09:45:53 +02:00
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reference: Reference::INTERNAL,
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gain: Gain::GAIN1_6,
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2021-03-24 18:33:17 +01:00
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resistor: Resistor::BYPASS,
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time: Time::_10US,
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2021-10-11 00:38:35 +02:00
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p_channel: p_input.channel(),
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n_channel: Some(n_input.channel()),
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2021-10-10 23:52:45 +02:00
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phantom: PhantomData,
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2021-03-24 18:33:17 +01:00
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}
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}
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}
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2021-10-12 02:24:26 +02:00
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/// The state of a continuously running sampler. While it reflects
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/// the progress of a sampler, it also signals what should be done
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/// next. For example, if the sampler has stopped then the Saadc implementation
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/// can then tear down its infrastructure.
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#[derive(PartialEq)]
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pub enum SamplerState {
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Sampled,
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Stopped,
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}
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impl<'d, const N: usize> Saadc<'d, N> {
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2021-03-24 18:33:17 +01:00
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pub fn new(
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2021-05-17 12:23:04 +02:00
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_saadc: impl Unborrow<Target = peripherals::SAADC> + 'd,
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2021-04-14 19:59:52 +02:00
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irq: impl Unborrow<Target = interrupt::SAADC> + 'd,
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2021-03-24 18:33:17 +01:00
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config: Config,
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channel_configs: [ChannelConfig; N],
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) -> Self {
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2021-05-21 13:06:28 +02:00
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unborrow!(irq);
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2021-03-24 18:33:17 +01:00
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let r = unsafe { &*SAADC::ptr() };
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let Config {
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resolution,
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oversample,
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} = config;
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2021-10-07 09:00:03 +02:00
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// Configure channels
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2021-03-24 18:33:17 +01:00
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r.enable.write(|w| w.enable().enabled());
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r.resolution.write(|w| w.val().variant(resolution));
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r.oversample.write(|w| w.oversample().variant(oversample));
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2021-10-07 09:00:03 +02:00
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for (i, cc) in channel_configs.iter().enumerate() {
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r.ch[i].pselp.write(|w| w.pselp().variant(cc.p_channel));
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2021-10-11 00:38:35 +02:00
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if let Some(n_channel) = cc.n_channel {
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r.ch[i]
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.pseln
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.write(|w| unsafe { w.pseln().bits(n_channel as u8) });
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2021-03-24 18:33:17 +01:00
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}
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2021-10-07 09:00:03 +02:00
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r.ch[i].config.write(|w| {
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w.refsel().variant(cc.reference);
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w.gain().variant(cc.gain);
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w.tacq().variant(cc.time);
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if cc.n_channel.is_none() {
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w.mode().se();
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} else {
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w.mode().diff();
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}
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w.resp().variant(cc.resistor);
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w.resn().bypass();
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if !matches!(oversample, Oversample::BYPASS) {
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w.burst().enabled();
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} else {
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w.burst().disabled();
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}
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w
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});
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}
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2021-03-24 18:33:17 +01:00
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// Disable all events interrupts
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r.intenclr.write(|w| unsafe { w.bits(0x003F_FFFF) });
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2021-09-01 23:54:26 +02:00
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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irq.enable();
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2021-03-24 18:33:17 +01:00
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Self {
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phantom: PhantomData,
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}
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}
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2021-09-01 23:54:26 +02:00
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fn on_interrupt(_ctx: *mut ()) {
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let r = Self::regs();
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if r.events_end.read().bits() != 0 {
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r.intenclr.write(|w| w.end().clear());
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WAKER.wake();
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}
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2021-10-12 02:24:26 +02:00
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if r.events_started.read().bits() != 0 {
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r.intenclr.write(|w| w.started().clear());
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WAKER.wake();
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}
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2021-09-01 23:54:26 +02:00
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}
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fn regs() -> &'static saadc::RegisterBlock {
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2021-03-24 18:33:17 +01:00
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unsafe { &*SAADC::ptr() }
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}
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2021-05-22 15:42:14 +02:00
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2021-10-12 02:24:26 +02:00
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/// One shot sampling. The buffer must be the same size as the number of channels configured.
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2021-10-07 09:00:03 +02:00
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pub async fn sample(&mut self, buf: &mut [i16; N]) {
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let r = Self::regs();
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// Set up the DMA
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r.result
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.ptr
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.write(|w| unsafe { w.ptr().bits(buf.as_mut_ptr() as u32) });
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r.result
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.maxcnt
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2021-10-10 23:54:24 +02:00
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.write(|w| unsafe { w.maxcnt().bits(N as _) });
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2021-05-22 15:42:14 +02:00
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// Reset and enable the end event
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r.events_end.reset();
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r.intenset.write(|w| w.end().set());
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// Don't reorder the ADC start event before the previous writes. Hopefully self
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// wouldn't happen anyway.
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compiler_fence(Ordering::SeqCst);
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r.tasks_start.write(|w| unsafe { w.bits(1) });
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r.tasks_sample.write(|w| unsafe { w.bits(1) });
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// Wait for 'end' event.
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poll_fn(|cx| {
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2021-09-01 23:54:26 +02:00
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let r = Self::regs();
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WAKER.register(cx.waker());
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2021-05-22 15:42:14 +02:00
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if r.events_end.read().bits() != 0 {
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r.events_end.reset();
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return Poll::Ready(());
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}
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Poll::Pending
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})
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.await;
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}
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2021-10-12 02:24:26 +02:00
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2021-10-18 02:45:23 +02:00
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/// Continuous sampling with double buffers.
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2021-10-16 21:56:56 +02:00
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///
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/// A task-driven approach to driving TASK_SAMPLE is expected. With a task
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/// driven approach, multiple channels can be used.
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///
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/// A sampler closure is provided that receives the buffer of samples, noting
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/// that the size of this buffer can be less than the original buffer's size.
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/// A command is return from the closure that indicates whether the sampling
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/// should continue or stop.
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pub async fn run_task_sampler<S, const N0: usize>(
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&mut self,
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2021-10-16 22:51:53 +02:00
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bufs: &mut [[[i16; N]; N0]; 2],
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sampler: S,
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) where
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2021-10-16 22:51:53 +02:00
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S: FnMut(&[[i16; N]]) -> SamplerState,
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{
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self.run_sampler(bufs, None, sampler).await;
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}
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async fn run_sampler<S, const N0: usize>(
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&mut self,
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2021-10-16 22:51:53 +02:00
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bufs: &mut [[[i16; N]; N0]; 2],
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2021-10-18 02:42:30 +02:00
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sample_rate_divisor: Option<u16>,
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2021-10-15 08:44:23 +02:00
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mut sampler: S,
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2021-10-12 02:24:26 +02:00
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) where
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2021-10-16 22:51:53 +02:00
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S: FnMut(&[[i16; N]]) -> SamplerState,
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{
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let r = Self::regs();
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// Establish mode and sample rate
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2021-10-18 02:42:30 +02:00
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match sample_rate_divisor {
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2021-10-16 21:56:56 +02:00
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Some(sr) => {
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2021-10-16 21:26:06 +02:00
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r.samplerate.write(|w| unsafe {
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2021-10-16 21:56:56 +02:00
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w.cc().bits(sr);
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2021-10-16 21:26:06 +02:00
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w.mode().timers();
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2021-10-14 23:12:13 +02:00
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w
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});
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r.tasks_sample.write(|w| unsafe { w.bits(1) }); // Need to kick-start the internal timer
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}
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2021-10-16 21:56:56 +02:00
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None => r.samplerate.write(|w| unsafe {
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2021-10-16 21:26:06 +02:00
|
|
|
w.cc().bits(0);
|
|
|
|
w.mode().task();
|
2021-10-12 02:24:26 +02:00
|
|
|
w
|
|
|
|
}),
|
|
|
|
}
|
|
|
|
|
|
|
|
// Set up the initial DMA
|
|
|
|
r.result
|
|
|
|
.ptr
|
|
|
|
.write(|w| unsafe { w.ptr().bits(bufs[0].as_mut_ptr() as u32) });
|
|
|
|
r.result
|
|
|
|
.maxcnt
|
2021-10-16 22:51:53 +02:00
|
|
|
.write(|w| unsafe { w.maxcnt().bits((N0 * N) as _) });
|
2021-10-12 02:24:26 +02:00
|
|
|
|
|
|
|
// Reset and enable the events
|
|
|
|
r.events_end.reset();
|
|
|
|
r.events_started.reset();
|
2021-10-16 21:28:19 +02:00
|
|
|
r.intenset.write(|w| {
|
|
|
|
w.end().set();
|
|
|
|
w.started().set();
|
|
|
|
w
|
|
|
|
});
|
2021-10-12 02:24:26 +02:00
|
|
|
|
|
|
|
// Don't reorder the ADC start event before the previous writes. Hopefully self
|
|
|
|
// wouldn't happen anyway.
|
|
|
|
compiler_fence(Ordering::SeqCst);
|
|
|
|
|
|
|
|
r.tasks_start.write(|w| unsafe { w.bits(1) });
|
|
|
|
|
|
|
|
let mut current_buffer = 0;
|
|
|
|
|
|
|
|
// Wait for events and complete when the sampler indicates it has had enough.
|
|
|
|
poll_fn(|cx| {
|
|
|
|
let r = Self::regs();
|
|
|
|
|
|
|
|
WAKER.register(cx.waker());
|
|
|
|
|
|
|
|
if r.events_end.read().bits() != 0 {
|
2021-10-18 02:28:43 +02:00
|
|
|
compiler_fence(Ordering::SeqCst);
|
|
|
|
|
2021-10-12 02:24:26 +02:00
|
|
|
r.events_end.reset();
|
|
|
|
r.intenset.write(|w| w.end().set());
|
|
|
|
|
2021-10-18 03:29:31 +02:00
|
|
|
if sampler(&bufs[current_buffer]) == SamplerState::Sampled {
|
2021-10-12 02:24:26 +02:00
|
|
|
let next_buffer = 1 - current_buffer;
|
|
|
|
current_buffer = next_buffer;
|
|
|
|
r.tasks_start.write(|w| unsafe { w.bits(1) });
|
|
|
|
} else {
|
|
|
|
return Poll::Ready(());
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
if r.events_started.read().bits() != 0 {
|
|
|
|
r.events_started.reset();
|
|
|
|
r.intenset.write(|w| w.started().set());
|
|
|
|
|
|
|
|
let next_buffer = 1 - current_buffer;
|
|
|
|
r.result
|
|
|
|
.ptr
|
|
|
|
.write(|w| unsafe { w.ptr().bits(bufs[next_buffer].as_mut_ptr() as u32) });
|
|
|
|
}
|
|
|
|
|
|
|
|
Poll::Pending
|
|
|
|
})
|
|
|
|
.await;
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Return the sample task for use with PPI
|
|
|
|
pub fn task_sample(&self) -> Task {
|
|
|
|
let r = Self::regs();
|
|
|
|
Task::from_reg(&r.tasks_sample)
|
|
|
|
}
|
2021-03-24 18:33:17 +01:00
|
|
|
}
|
|
|
|
|
2021-10-16 22:02:17 +02:00
|
|
|
impl<'d> Saadc<'d, 1> {
|
2021-10-18 02:45:23 +02:00
|
|
|
/// Continuous sampling on a single channel with double buffers.
|
2021-10-16 22:02:17 +02:00
|
|
|
///
|
|
|
|
/// The internal clock is to be used with a sample rate expressed as a divisor of
|
|
|
|
/// 16MHz, ranging from 80..2047. For example, 1600 represnts a sample rate of 10KHz
|
|
|
|
/// given 16_000_000 / 10_000_000 = 1600.
|
|
|
|
///
|
|
|
|
/// A sampler closure is provided that receives the buffer of samples, noting
|
|
|
|
/// that the size of this buffer can be less than the original buffer's size.
|
|
|
|
/// A command is return from the closure that indicates whether the sampling
|
|
|
|
/// should continue or stop.
|
|
|
|
pub async fn run_timer_sampler<S, const N0: usize>(
|
|
|
|
&mut self,
|
2021-10-16 22:51:53 +02:00
|
|
|
bufs: &mut [[[i16; 1]; N0]; 2],
|
2021-10-18 02:42:30 +02:00
|
|
|
sample_rate_divisor: u16,
|
2021-10-16 22:02:17 +02:00
|
|
|
sampler: S,
|
|
|
|
) where
|
2021-10-16 22:51:53 +02:00
|
|
|
S: FnMut(&[[i16; 1]]) -> SamplerState,
|
2021-10-16 22:02:17 +02:00
|
|
|
{
|
2021-10-18 02:45:23 +02:00
|
|
|
self.run_sampler(bufs, Some(sample_rate_divisor), sampler)
|
|
|
|
.await;
|
2021-10-16 22:02:17 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-10-12 02:24:26 +02:00
|
|
|
impl<'d, const N: usize> Drop for Saadc<'d, N> {
|
2021-03-24 18:33:17 +01:00
|
|
|
fn drop(&mut self) {
|
2021-09-01 23:54:26 +02:00
|
|
|
let r = Self::regs();
|
2021-03-24 18:33:17 +01:00
|
|
|
r.enable.write(|w| w.enable().disabled());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-10-13 22:01:39 +02:00
|
|
|
pub(crate) mod sealed {
|
|
|
|
use super::*;
|
|
|
|
|
|
|
|
pub trait Input {
|
|
|
|
fn channel(&self) -> InputChannel;
|
|
|
|
}
|
2021-03-24 18:33:17 +01:00
|
|
|
}
|
|
|
|
|
2021-10-13 22:01:39 +02:00
|
|
|
/// An input that can be used as either or negative end of a ADC differential in the SAADC periperhal.
|
|
|
|
pub trait Input: sealed::Input + Unborrow<Target = Self> {}
|
|
|
|
|
2021-10-11 01:22:01 +02:00
|
|
|
macro_rules! impl_saadc_input {
|
|
|
|
($pin:ident, $ch:ident) => {
|
2021-10-13 22:01:39 +02:00
|
|
|
impl crate::saadc::sealed::Input for crate::peripherals::$pin {
|
2021-10-11 01:22:01 +02:00
|
|
|
fn channel(&self) -> crate::saadc::InputChannel {
|
|
|
|
crate::saadc::InputChannel::$ch
|
2021-10-07 09:00:03 +02:00
|
|
|
}
|
2021-10-11 01:22:01 +02:00
|
|
|
}
|
2021-10-13 22:01:39 +02:00
|
|
|
impl crate::saadc::Input for crate::peripherals::$pin {}
|
2021-10-07 09:00:03 +02:00
|
|
|
};
|
|
|
|
}
|