2023-03-27 18:04:48 +02:00
|
|
|
#![no_std]
|
|
|
|
#![allow(incomplete_features)]
|
|
|
|
#![feature(async_fn_in_trait)]
|
|
|
|
|
2023-02-19 16:31:35 +01:00
|
|
|
use core::slice;
|
|
|
|
|
|
|
|
use cyw43::SpiBusCyw43;
|
|
|
|
use embassy_rp::dma::Channel;
|
2023-03-21 19:15:54 +01:00
|
|
|
use embassy_rp::gpio::{Drive, Output, Pin, Pull, SlewRate};
|
2023-02-19 16:31:35 +01:00
|
|
|
use embassy_rp::pio::{PioStateMachine, ShiftDirection};
|
|
|
|
use embassy_rp::relocate::RelocatedProgram;
|
|
|
|
use embassy_rp::{pio_instr_util, Peripheral};
|
|
|
|
use pio::Wrap;
|
|
|
|
use pio_proc::pio_asm;
|
|
|
|
|
2023-03-21 19:15:54 +01:00
|
|
|
pub struct PioSpi<CS: Pin, SM, DMA> {
|
|
|
|
cs: Output<'static, CS>,
|
2023-02-19 16:31:35 +01:00
|
|
|
sm: SM,
|
|
|
|
dma: DMA,
|
|
|
|
wrap_target: u8,
|
|
|
|
}
|
|
|
|
|
2023-03-21 19:15:54 +01:00
|
|
|
impl<CS, SM, DMA> PioSpi<CS, SM, DMA>
|
2023-02-19 16:31:35 +01:00
|
|
|
where
|
|
|
|
SM: PioStateMachine,
|
|
|
|
DMA: Channel,
|
2023-03-21 19:15:54 +01:00
|
|
|
CS: Pin,
|
2023-02-19 16:31:35 +01:00
|
|
|
{
|
2023-03-21 19:15:54 +01:00
|
|
|
pub fn new<DIO, CLK>(mut sm: SM, cs: Output<'static, CS>, dio: DIO, clk: CLK, dma: DMA) -> Self
|
2023-02-19 16:31:35 +01:00
|
|
|
where
|
|
|
|
DIO: Pin,
|
|
|
|
CLK: Pin,
|
|
|
|
{
|
|
|
|
let program = pio_asm!(
|
|
|
|
".side_set 1"
|
|
|
|
// "set pindirs, 1 side 0"
|
|
|
|
// "set pins, 0 side 0"
|
|
|
|
".wrap_target"
|
|
|
|
"lp:",
|
|
|
|
"out pins, 1 side 0"
|
|
|
|
"jmp x-- lp side 1"
|
|
|
|
"set pindirs, 0 side 0"
|
2023-03-19 16:43:46 +01:00
|
|
|
"nop side 1"
|
2023-02-19 16:31:35 +01:00
|
|
|
"lp2:"
|
2023-03-19 16:43:46 +01:00
|
|
|
"in pins, 1 side 1"
|
|
|
|
"jmp y-- lp2 side 0"
|
|
|
|
|
2023-03-02 19:02:32 +01:00
|
|
|
"wait 1 pin 0 side 0"
|
|
|
|
"irq 0 side 0"
|
|
|
|
|
2023-02-19 16:31:35 +01:00
|
|
|
".wrap"
|
|
|
|
);
|
|
|
|
|
|
|
|
let relocated = RelocatedProgram::new(&program.program);
|
|
|
|
|
|
|
|
let mut pin_io = sm.make_pio_pin(dio);
|
|
|
|
pin_io.set_pull(Pull::Down);
|
|
|
|
pin_io.set_schmitt(true);
|
2023-03-19 16:43:46 +01:00
|
|
|
pin_io.set_input_sync_bypass(true);
|
|
|
|
|
|
|
|
let mut pin_clk = sm.make_pio_pin(clk);
|
|
|
|
pin_clk.set_drive_strength(Drive::_12mA);
|
|
|
|
pin_clk.set_slew_rate(SlewRate::Fast);
|
2023-02-19 16:31:35 +01:00
|
|
|
|
|
|
|
sm.write_instr(relocated.origin() as usize, relocated.code());
|
|
|
|
|
2023-03-19 16:43:46 +01:00
|
|
|
// 32 Mhz
|
|
|
|
sm.set_clkdiv(0x03E8);
|
|
|
|
|
2023-02-19 16:31:35 +01:00
|
|
|
// 16 Mhz
|
2023-03-19 16:43:46 +01:00
|
|
|
// sm.set_clkdiv(0x07d0);
|
2023-02-19 16:31:35 +01:00
|
|
|
|
|
|
|
// 8Mhz
|
2023-03-19 16:43:46 +01:00
|
|
|
// sm.set_clkdiv(0x0a_00);
|
2023-02-19 16:31:35 +01:00
|
|
|
|
|
|
|
// 1Mhz
|
|
|
|
// sm.set_clkdiv(0x7d_00);
|
|
|
|
|
|
|
|
// slowest possible
|
|
|
|
// sm.set_clkdiv(0xffff_00);
|
|
|
|
|
|
|
|
sm.set_autopull(true);
|
|
|
|
// sm.set_pull_threshold(32);
|
|
|
|
sm.set_autopush(true);
|
|
|
|
// sm.set_push_threshold(32);
|
|
|
|
|
|
|
|
sm.set_out_pins(&[&pin_io]);
|
|
|
|
sm.set_in_base_pin(&pin_io);
|
|
|
|
|
|
|
|
sm.set_set_pins(&[&pin_clk]);
|
|
|
|
pio_instr_util::set_pindir(&mut sm, 0b1);
|
|
|
|
sm.set_set_pins(&[&pin_io]);
|
|
|
|
pio_instr_util::set_pindir(&mut sm, 0b1);
|
|
|
|
|
|
|
|
sm.set_sideset_base_pin(&pin_clk);
|
|
|
|
sm.set_sideset_count(1);
|
|
|
|
|
|
|
|
sm.set_out_shift_dir(ShiftDirection::Left);
|
|
|
|
sm.set_in_shift_dir(ShiftDirection::Left);
|
|
|
|
|
|
|
|
let Wrap { source, target } = relocated.wrap();
|
|
|
|
sm.set_wrap(source, target);
|
|
|
|
|
|
|
|
// pull low for startup
|
|
|
|
pio_instr_util::set_pin(&mut sm, 0);
|
|
|
|
|
|
|
|
Self {
|
2023-03-21 19:15:54 +01:00
|
|
|
cs,
|
2023-02-19 16:31:35 +01:00
|
|
|
sm,
|
|
|
|
dma,
|
|
|
|
wrap_target: target,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-03-27 17:24:45 +02:00
|
|
|
pub async fn write(&mut self, write: &[u32]) -> u32 {
|
2023-03-02 19:02:32 +01:00
|
|
|
self.sm.set_enable(false);
|
2023-02-19 16:31:35 +01:00
|
|
|
let write_bits = write.len() * 32 - 1;
|
|
|
|
let read_bits = 31;
|
|
|
|
|
|
|
|
defmt::trace!("write={} read={}", write_bits, read_bits);
|
|
|
|
|
|
|
|
let mut dma = Peripheral::into_ref(&mut self.dma);
|
|
|
|
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
|
|
|
|
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
|
|
|
|
pio_instr_util::set_pindir(&mut self.sm, 0b1);
|
|
|
|
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
|
|
|
|
|
|
|
|
self.sm.set_enable(true);
|
|
|
|
|
|
|
|
self.sm.dma_push(dma.reborrow(), write).await;
|
|
|
|
|
2023-03-27 18:04:48 +02:00
|
|
|
let mut status = 0;
|
|
|
|
self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await;
|
2023-03-27 17:24:45 +02:00
|
|
|
status
|
2023-02-19 16:31:35 +01:00
|
|
|
}
|
|
|
|
|
2023-03-27 17:24:45 +02:00
|
|
|
pub async fn cmd_read(&mut self, cmd: u32, read: &mut [u32]) -> u32 {
|
2023-03-02 19:02:32 +01:00
|
|
|
self.sm.set_enable(false);
|
2023-02-19 16:31:35 +01:00
|
|
|
let write_bits = 31;
|
2023-03-27 17:24:45 +02:00
|
|
|
let read_bits = read.len() * 32 + 32 - 1;
|
2023-02-19 16:31:35 +01:00
|
|
|
|
|
|
|
defmt::trace!("write={} read={}", write_bits, read_bits);
|
|
|
|
|
|
|
|
let mut dma = Peripheral::into_ref(&mut self.dma);
|
|
|
|
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
|
|
|
|
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
|
|
|
|
pio_instr_util::set_pindir(&mut self.sm, 0b1);
|
|
|
|
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
|
|
|
|
// self.cs.set_low();
|
|
|
|
self.sm.set_enable(true);
|
|
|
|
|
|
|
|
self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await;
|
2023-03-27 18:04:48 +02:00
|
|
|
self.sm.dma_pull(dma.reborrow(), read).await;
|
2023-03-27 17:24:45 +02:00
|
|
|
|
2023-03-27 18:04:48 +02:00
|
|
|
let mut status = 0;
|
|
|
|
self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await;
|
2023-03-27 17:24:45 +02:00
|
|
|
status
|
2023-02-19 16:31:35 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-03-21 19:15:54 +01:00
|
|
|
impl<CS, SM, DMA> SpiBusCyw43 for PioSpi<CS, SM, DMA>
|
2023-02-19 16:31:35 +01:00
|
|
|
where
|
2023-03-21 19:15:54 +01:00
|
|
|
CS: Pin,
|
2023-02-19 16:31:35 +01:00
|
|
|
SM: PioStateMachine,
|
|
|
|
DMA: Channel,
|
|
|
|
{
|
2023-03-27 17:24:45 +02:00
|
|
|
async fn cmd_write(&mut self, write: &[u32]) -> u32 {
|
2023-03-21 19:15:54 +01:00
|
|
|
self.cs.set_low();
|
2023-03-27 17:24:45 +02:00
|
|
|
let status = self.write(write).await;
|
2023-03-21 19:15:54 +01:00
|
|
|
self.cs.set_high();
|
2023-03-27 17:24:45 +02:00
|
|
|
status
|
2023-02-19 16:31:35 +01:00
|
|
|
}
|
|
|
|
|
2023-03-27 17:24:45 +02:00
|
|
|
async fn cmd_read(&mut self, write: u32, read: &mut [u32]) -> u32 {
|
2023-03-21 19:15:54 +01:00
|
|
|
self.cs.set_low();
|
2023-03-27 17:24:45 +02:00
|
|
|
let status = self.cmd_read(write, read).await;
|
2023-03-21 19:15:54 +01:00
|
|
|
self.cs.set_high();
|
2023-03-27 17:24:45 +02:00
|
|
|
status
|
2023-02-19 16:31:35 +01:00
|
|
|
}
|
2023-03-02 19:02:32 +01:00
|
|
|
|
|
|
|
async fn wait_for_event(&mut self) {
|
|
|
|
self.sm.wait_irq(0).await;
|
|
|
|
self.sm.clear_irq(0);
|
|
|
|
}
|
2023-02-19 16:31:35 +01:00
|
|
|
}
|