embassy/embassy-net-w5500/src/device.rs

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use embedded_hal_async::spi::SpiDevice;
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use crate::socket;
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use crate::spi::{Address, SpiInterface};
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pub const MODE: Address = (RegisterBlock::Common, 0x00);
pub const MAC: Address = (RegisterBlock::Common, 0x09);
pub const SOCKET_INTR: Address = (RegisterBlock::Common, 0x18);
pub const PHY_CFG: Address = (RegisterBlock::Common, 0x2E);
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#[repr(u8)]
pub enum RegisterBlock {
Common = 0x00,
Socket0 = 0x01,
TxBuf = 0x02,
RxBuf = 0x03,
}
/// W5500 in MACRAW mode
#[derive(Debug)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub struct W5500<SPI> {
bus: SpiInterface<SPI>,
}
impl<SPI: SpiDevice> W5500<SPI> {
/// Create and initialize the W5500 driver
pub async fn new(spi: SPI, mac_addr: [u8; 6]) -> Result<W5500<SPI>, SPI::Error> {
let mut bus = SpiInterface(spi);
// Reset device
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bus.write_frame(MODE, &[0x80]).await?;
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// Enable interrupt pin
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bus.write_frame(SOCKET_INTR, &[0x01]).await?;
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// Enable receive interrupt
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bus.write_frame(socket::SOCKET_INTR_MASK, &[socket::Interrupt::Receive as u8])
.await?;
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// Set MAC address
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bus.write_frame(MAC, &mac_addr).await?;
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// Set the raw socket RX/TX buffer sizes to 16KB
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bus.write_frame(socket::TXBUF_SIZE, &[16]).await?;
bus.write_frame(socket::RXBUF_SIZE, &[16]).await?;
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// MACRAW mode with MAC filtering.
let mode: u8 = (1 << 2) | (1 << 7);
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bus.write_frame(socket::MODE, &[mode]).await?;
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socket::command(&mut bus, socket::Command::Open).await?;
Ok(Self { bus })
}
/// Read bytes from the RX buffer. Returns the number of bytes read.
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async fn read_bytes(&mut self, read_ptr: &mut u16, buffer: &mut [u8]) -> Result<(), SPI::Error> {
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self.bus.read_frame((RegisterBlock::RxBuf, *read_ptr), buffer).await?;
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*read_ptr = (*read_ptr).wrapping_add(buffer.len() as u16);
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Ok(())
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}
/// Read an ethernet frame from the device. Returns the number of bytes read.
pub async fn read_frame(&mut self, frame: &mut [u8]) -> Result<usize, SPI::Error> {
let rx_size = socket::get_rx_size(&mut self.bus).await? as usize;
if rx_size == 0 {
return Ok(0);
}
socket::reset_interrupt(&mut self.bus, socket::Interrupt::Receive).await?;
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let mut read_ptr = socket::get_rx_read_ptr(&mut self.bus).await?;
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// First two bytes gives the size of the received ethernet frame
let expected_frame_size: usize = {
let mut frame_bytes = [0u8; 2];
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self.read_bytes(&mut read_ptr, &mut frame_bytes).await?;
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u16::from_be_bytes(frame_bytes) as usize - 2
};
// Read the ethernet frame
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self.read_bytes(&mut read_ptr, &mut frame[..expected_frame_size])
.await?;
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// Register RX as completed
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socket::set_rx_read_ptr(&mut self.bus, read_ptr).await?;
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socket::command(&mut self.bus, socket::Command::Receive).await?;
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Ok(expected_frame_size)
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}
/// Write an ethernet frame to the device. Returns number of bytes written
pub async fn write_frame(&mut self, frame: &[u8]) -> Result<usize, SPI::Error> {
while socket::get_tx_free_size(&mut self.bus).await? < frame.len() as u16 {}
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let write_ptr = socket::get_tx_write_ptr(&mut self.bus).await?;
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self.bus.write_frame((RegisterBlock::TxBuf, write_ptr), frame).await?;
socket::set_tx_write_ptr(&mut self.bus, write_ptr.wrapping_add(frame.len() as u16)).await?;
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socket::command(&mut self.bus, socket::Command::Send).await?;
Ok(frame.len())
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}
pub async fn is_link_up(&mut self) -> bool {
let mut link = [0];
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self.bus.read_frame(PHY_CFG, &mut link).await.ok();
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link[0] & 1 == 1
}
}