2021-05-11 03:04:59 +02:00
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pub use nrf52840_pac as pac;
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2021-08-22 01:23:03 +02:00
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/// The maximum buffer size that the EasyDMA can send/recv in one operation.
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2021-05-11 03:04:59 +02:00
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pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
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pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
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2021-10-22 02:09:55 +02:00
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pub const FLASH_SIZE: usize = 1024 * 1024;
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2021-07-29 13:44:51 +02:00
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embassy_hal_common::peripherals! {
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2021-12-15 18:11:00 +01:00
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// USB
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USBD,
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2021-05-11 03:04:59 +02:00
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// RTC
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RTC0,
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RTC1,
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RTC2,
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2021-08-07 14:26:28 +02:00
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// WDT
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WDT,
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2021-10-22 02:09:55 +02:00
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// NVMC
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NVMC,
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2021-06-29 09:26:16 +02:00
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// RNG
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RNG,
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2021-05-11 03:04:59 +02:00
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// QSPI
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QSPI,
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2022-05-07 00:46:36 +02:00
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// QDEC
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QDEC,
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2021-05-11 03:04:59 +02:00
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// UARTE
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UARTE0,
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UARTE1,
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// SPI/TWI
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TWISPI0,
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TWISPI1,
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SPI2,
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SPI3,
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// SAADC
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SAADC,
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2021-05-12 04:56:11 +02:00
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// PWM
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PWM0,
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PWM1,
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PWM2,
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PWM3,
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2021-05-11 03:04:59 +02:00
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// TIMER
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TIMER0,
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TIMER1,
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TIMER2,
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TIMER3,
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TIMER4,
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// GPIOTE
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GPIOTE_CH0,
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GPIOTE_CH1,
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GPIOTE_CH2,
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GPIOTE_CH3,
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GPIOTE_CH4,
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GPIOTE_CH5,
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GPIOTE_CH6,
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GPIOTE_CH7,
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// PPI
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PPI_CH0,
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PPI_CH1,
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PPI_CH2,
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PPI_CH3,
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PPI_CH4,
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PPI_CH5,
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PPI_CH6,
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PPI_CH7,
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PPI_CH8,
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PPI_CH9,
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PPI_CH10,
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PPI_CH11,
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PPI_CH12,
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PPI_CH13,
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PPI_CH14,
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PPI_CH15,
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PPI_CH16,
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PPI_CH17,
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PPI_CH18,
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PPI_CH19,
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PPI_CH20,
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PPI_CH21,
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PPI_CH22,
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PPI_CH23,
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PPI_CH24,
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PPI_CH25,
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PPI_CH26,
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PPI_CH27,
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PPI_CH28,
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PPI_CH29,
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PPI_CH30,
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PPI_CH31,
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PPI_GROUP0,
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PPI_GROUP1,
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PPI_GROUP2,
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PPI_GROUP3,
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PPI_GROUP4,
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PPI_GROUP5,
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// GPIO port 0
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P0_00,
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P0_01,
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P0_02,
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P0_03,
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P0_04,
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P0_05,
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P0_06,
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P0_07,
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P0_08,
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P0_09,
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P0_10,
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P0_11,
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P0_12,
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P0_13,
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P0_14,
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P0_15,
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P0_16,
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P0_17,
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P0_18,
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P0_19,
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P0_20,
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P0_21,
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P0_22,
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P0_23,
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P0_24,
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P0_25,
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P0_26,
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P0_27,
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P0_28,
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P0_29,
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P0_30,
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P0_31,
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// GPIO port 1
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P1_00,
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P1_01,
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P1_02,
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P1_03,
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P1_04,
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P1_05,
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P1_06,
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P1_07,
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P1_08,
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P1_09,
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P1_10,
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P1_11,
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P1_12,
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P1_13,
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P1_14,
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P1_15,
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2021-10-18 15:24:31 +02:00
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// TEMP
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TEMP,
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2022-07-10 20:12:25 +02:00
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// PDM
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PDM,
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2022-11-09 19:14:43 +01:00
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// I2S
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I2S,
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2021-05-11 03:04:59 +02:00
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}
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2022-03-30 01:18:37 +02:00
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#[cfg(feature = "nightly")]
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2021-12-15 18:11:00 +01:00
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impl_usb!(USBD, USBD, USBD);
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2021-05-11 03:04:59 +02:00
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impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
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impl_uarte!(UARTE1, UARTE1, UARTE1);
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impl_spim!(TWISPI0, SPIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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impl_spim!(TWISPI1, SPIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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impl_spim!(SPI2, SPIM2, SPIM2_SPIS2_SPI2);
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impl_spim!(SPI3, SPIM3, SPIM3);
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2022-11-05 00:15:43 +01:00
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impl_spis!(TWISPI0, SPIS0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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impl_spis!(TWISPI1, SPIS1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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impl_spis!(SPI2, SPIS2, SPIM2_SPIS2_SPI2);
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2021-05-11 03:07:37 +02:00
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impl_twim!(TWISPI0, TWIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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impl_twim!(TWISPI1, TWIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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2022-11-13 22:15:19 +01:00
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impl_twis!(TWISPI0, TWIS0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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impl_twis!(TWISPI1, TWIS1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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2021-05-12 04:56:11 +02:00
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impl_pwm!(PWM0, PWM0, PWM0);
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impl_pwm!(PWM1, PWM1, PWM1);
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impl_pwm!(PWM2, PWM2, PWM2);
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impl_pwm!(PWM3, PWM3, PWM3);
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2021-05-11 03:04:59 +02:00
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impl_timer!(TIMER0, TIMER0, TIMER0);
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impl_timer!(TIMER1, TIMER1, TIMER1);
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impl_timer!(TIMER2, TIMER2, TIMER2);
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impl_timer!(TIMER3, TIMER3, TIMER3, extended);
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impl_timer!(TIMER4, TIMER4, TIMER4, extended);
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impl_qspi!(QSPI, QSPI, QSPI);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_02, 0, 2);
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impl_pin!(P0_03, 0, 3);
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impl_pin!(P0_04, 0, 4);
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impl_pin!(P0_05, 0, 5);
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impl_pin!(P0_06, 0, 6);
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impl_pin!(P0_07, 0, 7);
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impl_pin!(P0_08, 0, 8);
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impl_pin!(P0_09, 0, 9);
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impl_pin!(P0_10, 0, 10);
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impl_pin!(P0_11, 0, 11);
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impl_pin!(P0_12, 0, 12);
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impl_pin!(P0_13, 0, 13);
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impl_pin!(P0_14, 0, 14);
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impl_pin!(P0_15, 0, 15);
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impl_pin!(P0_16, 0, 16);
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impl_pin!(P0_17, 0, 17);
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impl_pin!(P0_18, 0, 18);
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impl_pin!(P0_19, 0, 19);
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impl_pin!(P0_20, 0, 20);
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impl_pin!(P0_21, 0, 21);
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impl_pin!(P0_22, 0, 22);
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impl_pin!(P0_23, 0, 23);
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impl_pin!(P0_24, 0, 24);
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impl_pin!(P0_25, 0, 25);
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impl_pin!(P0_26, 0, 26);
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impl_pin!(P0_27, 0, 27);
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impl_pin!(P0_28, 0, 28);
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impl_pin!(P0_29, 0, 29);
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impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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impl_pin!(P1_00, 1, 0);
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impl_pin!(P1_01, 1, 1);
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impl_pin!(P1_02, 1, 2);
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impl_pin!(P1_03, 1, 3);
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impl_pin!(P1_04, 1, 4);
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impl_pin!(P1_05, 1, 5);
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impl_pin!(P1_06, 1, 6);
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impl_pin!(P1_07, 1, 7);
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impl_pin!(P1_08, 1, 8);
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impl_pin!(P1_09, 1, 9);
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impl_pin!(P1_10, 1, 10);
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impl_pin!(P1_11, 1, 11);
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impl_pin!(P1_12, 1, 12);
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impl_pin!(P1_13, 1, 13);
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impl_pin!(P1_14, 1, 14);
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impl_pin!(P1_15, 1, 15);
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2021-10-26 09:45:29 +02:00
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impl_ppi_channel!(PPI_CH0, 0 => configurable);
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impl_ppi_channel!(PPI_CH1, 1 => configurable);
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impl_ppi_channel!(PPI_CH2, 2 => configurable);
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impl_ppi_channel!(PPI_CH3, 3 => configurable);
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impl_ppi_channel!(PPI_CH4, 4 => configurable);
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impl_ppi_channel!(PPI_CH5, 5 => configurable);
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impl_ppi_channel!(PPI_CH6, 6 => configurable);
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impl_ppi_channel!(PPI_CH7, 7 => configurable);
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impl_ppi_channel!(PPI_CH8, 8 => configurable);
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impl_ppi_channel!(PPI_CH9, 9 => configurable);
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impl_ppi_channel!(PPI_CH10, 10 => configurable);
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impl_ppi_channel!(PPI_CH11, 11 => configurable);
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impl_ppi_channel!(PPI_CH12, 12 => configurable);
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impl_ppi_channel!(PPI_CH13, 13 => configurable);
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impl_ppi_channel!(PPI_CH14, 14 => configurable);
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impl_ppi_channel!(PPI_CH15, 15 => configurable);
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impl_ppi_channel!(PPI_CH16, 16 => configurable);
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impl_ppi_channel!(PPI_CH17, 17 => configurable);
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impl_ppi_channel!(PPI_CH18, 18 => configurable);
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impl_ppi_channel!(PPI_CH19, 19 => configurable);
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impl_ppi_channel!(PPI_CH20, 20 => static);
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impl_ppi_channel!(PPI_CH21, 21 => static);
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impl_ppi_channel!(PPI_CH22, 22 => static);
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impl_ppi_channel!(PPI_CH23, 23 => static);
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impl_ppi_channel!(PPI_CH24, 24 => static);
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impl_ppi_channel!(PPI_CH25, 25 => static);
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impl_ppi_channel!(PPI_CH26, 26 => static);
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impl_ppi_channel!(PPI_CH27, 27 => static);
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impl_ppi_channel!(PPI_CH28, 28 => static);
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impl_ppi_channel!(PPI_CH29, 29 => static);
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impl_ppi_channel!(PPI_CH30, 30 => static);
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impl_ppi_channel!(PPI_CH31, 31 => static);
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2021-10-11 01:19:06 +02:00
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2022-10-26 09:13:26 +02:00
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impl_saadc_input!(P0_02, ANALOG_INPUT0);
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impl_saadc_input!(P0_03, ANALOG_INPUT1);
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impl_saadc_input!(P0_04, ANALOG_INPUT2);
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impl_saadc_input!(P0_05, ANALOG_INPUT3);
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impl_saadc_input!(P0_28, ANALOG_INPUT4);
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impl_saadc_input!(P0_29, ANALOG_INPUT5);
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impl_saadc_input!(P0_30, ANALOG_INPUT6);
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impl_saadc_input!(P0_31, ANALOG_INPUT7);
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2021-10-11 01:22:01 +02:00
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2022-11-09 19:14:43 +01:00
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impl_i2s!(I2S, I2S, I2S);
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2021-05-11 03:04:59 +02:00
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pub mod irqs {
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2022-08-17 18:49:55 +02:00
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use embassy_cortex_m::interrupt::_export::declare;
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2021-05-17 03:01:30 +02:00
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2022-06-12 22:15:44 +02:00
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use crate::pac::Interrupt as InterruptEnum;
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2021-05-11 03:04:59 +02:00
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
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declare!(NFCT);
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declare!(GPIOTE);
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declare!(SAADC);
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declare!(TIMER0);
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declare!(TIMER1);
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declare!(TIMER2);
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declare!(RTC0);
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declare!(TEMP);
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declare!(RNG);
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declare!(ECB);
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declare!(CCM_AAR);
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declare!(WDT);
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declare!(RTC1);
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declare!(QDEC);
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declare!(COMP_LPCOMP);
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declare!(SWI0_EGU0);
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declare!(SWI1_EGU1);
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declare!(SWI2_EGU2);
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declare!(SWI3_EGU3);
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declare!(SWI4_EGU4);
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declare!(SWI5_EGU5);
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declare!(TIMER3);
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declare!(TIMER4);
|
|
|
|
declare!(PWM0);
|
|
|
|
declare!(PDM);
|
|
|
|
declare!(MWU);
|
|
|
|
declare!(PWM1);
|
|
|
|
declare!(PWM2);
|
|
|
|
declare!(SPIM2_SPIS2_SPI2);
|
|
|
|
declare!(RTC2);
|
|
|
|
declare!(FPU);
|
|
|
|
declare!(USBD);
|
|
|
|
declare!(UARTE1);
|
|
|
|
declare!(QSPI);
|
|
|
|
declare!(CRYPTOCELL);
|
|
|
|
declare!(PWM3);
|
|
|
|
declare!(SPIM3);
|
2022-11-19 01:38:03 +01:00
|
|
|
declare!(I2S);
|
2021-05-11 03:04:59 +02:00
|
|
|
}
|