stm32: fix build, add ci
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8
.github/workflows/rust.yml
vendored
8
.github/workflows/rust.yml
vendored
@ -57,6 +57,14 @@ jobs:
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features: nrf52840,defmt
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- package: embassy-rp-examples
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target: thumbv6m-none-eabi
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- package: embassy-stm32
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target: thumbv7em-none-eabi
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features: stm32f411ce
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- package: embassy-stm32
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target: thumbv7em-none-eabi
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features: stm32f429zi
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- package: embassy-stm32-examples
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target: thumbv7em-none-eabi
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steps:
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- uses: actions/checkout@v2
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@ -153,7 +153,9 @@ impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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@ -158,7 +158,9 @@ impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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@ -159,7 +159,9 @@ impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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@ -157,7 +157,9 @@ impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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@ -172,7 +172,9 @@ impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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@ -212,7 +212,9 @@ impl_pin!(P1_14, 1, 14);
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impl_pin!(P1_15, 1, 15);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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@ -217,7 +217,9 @@ impl_pin!(P1_14, 1, 14);
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impl_pin!(P1_15, 1, 15);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(POWER_CLOCK);
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declare!(RADIO);
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declare!(UARTE0_UART0);
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@ -1,9 +1,8 @@
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use core::sync::atomic::{compiler_fence, Ordering};
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use defmt::{assert, *};
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use crate::fmt::{assert, *};
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use crate::pac::dma::vals;
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use crate::{pac, peripherals};
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use pac::dma::vals;
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pub struct Dma<T: Channel> {
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inner: T,
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@ -9,6 +9,7 @@ pub use embassy_extras::interrupt::Priority3 as Priority;
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mod irqs {
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use super::*;
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use crate::pac::Interrupt as InterruptEnum;
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declare!(TIMER_IRQ_0);
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declare!(TIMER_IRQ_1);
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@ -1,6 +1,6 @@
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use core::ops::Deref;
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use defmt::{assert, *};
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use crate::fmt::{assert, *};
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use crate::pac;
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const XOSC_MHZ: u32 = 12;
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17
embassy-stm32-examples/src/example_common.rs
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17
embassy-stm32-examples/src/example_common.rs
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@ -0,0 +1,17 @@
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#![macro_use]
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use defmt_rtt as _; // global logger
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use panic_probe as _;
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pub use defmt::*;
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use core::sync::atomic::{AtomicUsize, Ordering};
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defmt::timestamp! {"{=u64}", {
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static COUNT: AtomicUsize = AtomicUsize::new(0);
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// NOTE(no-CAS) `timestamps` runs with interrupts disabled
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let n = COUNT.load(Ordering::Relaxed);
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COUNT.store(n + 1, Ordering::Relaxed);
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n as u64
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}
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}
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@ -19,6 +19,7 @@ futures = { version = "0.3.5", default-features = false, features = ["async-awai
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rand_core = { version = "0.6.2", optional = true }
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sdio-host = { version = "0.5.0", optional = true }
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embedded-sdmmc = { git = "https://github.com/thalesfragoso/embedded-sdmmc-rs", branch = "async", optional = true }
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critical-section = "0.2.1"
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[build-dependencies]
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regex = "1.4.6"
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@ -184,4 +184,4 @@ pub(crate) unsafe fn init() {
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interrupt::DMA2_Stream5::steal().enable();
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interrupt::DMA2_Stream6::steal().enable();
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interrupt::DMA2_Stream7::steal().enable();
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}
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}
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114
embassy-stm32/src/fmt.rs
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114
embassy-stm32/src/fmt.rs
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@ -0,0 +1,114 @@
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#![macro_use]
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#![allow(clippy::module_inception)]
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#![allow(unused)]
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#[cfg(all(feature = "defmt", feature = "log"))]
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compile_error!("You may not enable both `defmt` and `log` features.");
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pub use fmt::*;
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#[cfg(feature = "defmt")]
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mod fmt {
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pub use defmt::{
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assert, assert_eq, assert_ne, debug, debug_assert, debug_assert_eq, debug_assert_ne, error,
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info, panic, todo, trace, unreachable, unwrap, warn,
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};
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}
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#[cfg(feature = "log")]
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mod fmt {
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pub use core::{
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assert, assert_eq, assert_ne, debug_assert, debug_assert_eq, debug_assert_ne, panic, todo,
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unreachable,
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};
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pub use log::{debug, error, info, trace, warn};
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}
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#[cfg(not(any(feature = "defmt", feature = "log")))]
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mod fmt {
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#![macro_use]
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pub use core::{
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assert, assert_eq, assert_ne, debug_assert, debug_assert_eq, debug_assert_ne, panic, todo,
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unreachable,
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};
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macro_rules! trace {
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($($msg:expr),+ $(,)?) => {
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()
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};
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}
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macro_rules! debug {
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($($msg:expr),+ $(,)?) => {
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()
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};
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}
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macro_rules! info {
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($($msg:expr),+ $(,)?) => {
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()
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};
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}
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macro_rules! warn {
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($($msg:expr),+ $(,)?) => {
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()
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};
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}
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macro_rules! error {
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($($msg:expr),+ $(,)?) => {
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()
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};
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}
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}
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#[cfg(not(feature = "defmt"))]
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macro_rules! unwrap {
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($arg:expr) => {
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match $crate::fmt::Try::into_result($arg) {
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::core::result::Result::Ok(t) => t,
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::core::result::Result::Err(e) => {
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::core::panic!("unwrap of `{}` failed: {:?}", ::core::stringify!($arg), e);
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}
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}
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};
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($arg:expr, $($msg:expr),+ $(,)? ) => {
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match $crate::fmt::Try::into_result($arg) {
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::core::result::Result::Ok(t) => t,
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::core::result::Result::Err(e) => {
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::core::panic!("unwrap of `{}` failed: {}: {:?}", ::core::stringify!($arg), ::core::format_args!($($msg,)*), e);
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}
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}
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}
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}
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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pub struct NoneError;
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pub trait Try {
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type Ok;
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type Error;
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fn into_result(self) -> Result<Self::Ok, Self::Error>;
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}
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impl<T> Try for Option<T> {
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type Ok = T;
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type Error = NoneError;
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#[inline]
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fn into_result(self) -> Result<T, NoneError> {
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self.ok_or(NoneError)
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}
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}
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impl<T, E> Try for Result<T, E> {
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type Ok = T;
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type Error = E;
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#[inline]
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fn into_result(self) -> Self {
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self
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}
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}
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@ -103,7 +103,11 @@ impl<'d, T: Instance> Uart<'d, T> {
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}
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#[cfg(feature = "_dma_v2")]
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pub async fn write_dma(&mut self, ch: &mut impl crate::dma::Channel, buffer: &[u8]) -> Result<(), Error> {
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pub async fn write_dma(
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&mut self,
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ch: &mut impl crate::dma::Channel,
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buffer: &[u8],
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) -> Result<(), Error> {
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let ch_func = 4; // USART3_TX
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let r = self.inner.regs();
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@ -0,0 +1 @@
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@ -11,6 +11,6 @@ pub mod delay;
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pub mod flash;
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pub mod gpio;
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pub mod i2c;
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pub mod rng;
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pub mod spi;
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pub mod uart;
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pub mod rng;
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