Fix stm32 warnings
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6f5c85c50f
commit
010b2b9497
@ -7,8 +7,7 @@ use crate::peripherals;
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pub use _version::*;
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pub(crate) mod sealed {
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use super::*;
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use crate::gpio::{OptionalPin, Pin};
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use crate::gpio::OptionalPin;
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pub trait Instance {
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fn regs() -> &'static crate::pac::dac::Dac;
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@ -1,11 +1,12 @@
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use crate::dac::{DacPin, Instance};
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use crate::gpio::Pin;
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use crate::gpio::{AnyPin, OptionalPin};
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use crate::fmt::*;
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use crate::gpio::AnyPin;
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use crate::pac::dac;
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use core::marker::PhantomData;
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use embassy::util::Unborrow;
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use embassy_extras::unborrow;
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#[derive(Debug, defmt::Format)]
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pub enum Error {
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UnconfiguredChannel,
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InvalidValue,
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@ -77,7 +78,6 @@ pub enum Value {
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}
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pub struct Dac<'d, T: Instance> {
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//peri: T,
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ch1: Option<AnyPin>,
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ch2: Option<AnyPin>,
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phantom: PhantomData<&'d mut T>,
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@ -85,11 +85,10 @@ pub struct Dac<'d, T: Instance> {
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impl<'d, T: Instance> Dac<'d, T> {
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pub fn new(
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peri: impl Unborrow<Target = T> + 'd,
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_peri: impl Unborrow<Target = T> + 'd,
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ch1: impl Unborrow<Target = impl DacPin<T, 1>>,
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ch2: impl Unborrow<Target = impl DacPin<T, 2>>,
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) -> Self {
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unborrow!(peri);
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unborrow!(ch1, ch2);
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let ch1 = ch1.degrade_optional();
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@ -110,13 +109,11 @@ impl<'d, T: Instance> Dac<'d, T> {
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}
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}
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let mut dac = Self {
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Self {
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ch1,
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ch2,
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phantom: PhantomData,
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};
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dac
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}
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}
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pub fn enable_channel(&mut self, ch: Channel) -> Result<(), Error> {
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@ -181,7 +178,7 @@ impl<'d, T: Instance> Dac<'d, T> {
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if self.ch1.is_none() {
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return Err(Error::UnconfiguredChannel);
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}
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self.disable_channel(Channel::Ch1);
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unwrap!(self.disable_channel(Channel::Ch1));
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unsafe {
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T::regs().cr().modify(|reg| {
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reg.set_tsel1(trigger.tsel());
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@ -194,7 +191,7 @@ impl<'d, T: Instance> Dac<'d, T> {
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if self.ch2.is_none() {
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return Err(Error::UnconfiguredChannel);
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}
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self.disable_channel(Channel::Ch2);
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unwrap!(self.disable_channel(Channel::Ch2));
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unsafe {
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T::regs().cr().modify(|reg| {
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reg.set_tsel2(trigger.tsel());
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@ -35,6 +35,7 @@ impl State {
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static STATE: State = State::new();
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#[allow(unused)] // Used by usart/v1.rs which may or may not be enabled
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pub(crate) async unsafe fn transfer_m2p(
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ch: &mut impl Channel,
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ch_func: u8,
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@ -16,7 +16,6 @@ pub enum Error {
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}
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pub(crate) mod sealed {
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use super::*;
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use crate::gpio::Pin;
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pub trait Instance {
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@ -1,5 +1,3 @@
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use crate::gpio::AnyPin;
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use crate::gpio::Pin;
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use crate::i2c::{Error, Instance, SclPin, SdaPin};
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use crate::time::Hertz;
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use core::marker::PhantomData;
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@ -10,24 +8,18 @@ use embedded_hal::blocking::i2c::Write;
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use embedded_hal::blocking::i2c::WriteRead;
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use crate::pac::i2c;
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use crate::pac::i2c::I2c as I2cTrait;
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use core::cmp;
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use crate::pac::gpio::vals::{Afr, Moder, Ot};
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use crate::pac::gpio::Gpio;
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use core::ops::Deref;
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pub struct I2c<'d, T: Instance> {
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//peri: T,
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scl: AnyPin,
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sda: AnyPin,
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phantom: PhantomData<&'d mut T>,
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}
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impl<'d, T: Instance> I2c<'d, T> {
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pub fn new<F>(
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pclk: Hertz,
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peri: impl Unborrow<Target = T> + 'd,
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_peri: impl Unborrow<Target = T> + 'd,
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scl: impl Unborrow<Target = impl SclPin<T>>,
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sda: impl Unborrow<Target = impl SdaPin<T>>,
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freq: F,
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@ -35,7 +27,6 @@ impl<'d, T: Instance> I2c<'d, T> {
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where
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F: Into<Hertz>,
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{
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unborrow!(peri);
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unborrow!(scl, sda);
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unsafe {
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@ -66,9 +57,6 @@ impl<'d, T: Instance> I2c<'d, T> {
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});
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}
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let scl = scl.degrade();
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let sda = sda.degrade();
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unsafe {
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T::regs().cr1().modify(|reg| {
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reg.set_pe(true);
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@ -76,8 +64,6 @@ impl<'d, T: Instance> I2c<'d, T> {
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}
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Self {
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scl,
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sda,
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phantom: PhantomData,
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}
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}
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@ -261,7 +247,7 @@ impl<'d, T: Instance> Read for I2c<'d, T> {
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*last = unsafe { self.recv_byte()? };
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// Wait for the STOP to be sent.
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while { unsafe { T::regs().cr1().read().stop() == i2c::vals::Stop::STOP } } {}
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while unsafe { T::regs().cr1().read().stop() == i2c::vals::Stop::STOP } {}
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// Fallthrough is success
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Ok(())
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@ -282,7 +268,7 @@ impl<'d, T: Instance> Write for I2c<'d, T> {
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.cr1()
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.modify(|reg| reg.set_stop(i2c::vals::Stop::STOP));
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// Wait for STOP condition to transmit.
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while { unsafe { T::regs().cr1().read().stop() == i2c::vals::Stop::STOP } } {}
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while T::regs().cr1().read().stop() == i2c::vals::Stop::STOP {}
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};
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// Fallthrough is success
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@ -6,26 +6,20 @@ use embedded_hal::blocking::i2c::Read;
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use embedded_hal::blocking::i2c::Write;
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use embedded_hal::blocking::i2c::WriteRead;
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use crate::gpio::AnyPin;
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use crate::gpio::Pin;
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use crate::i2c::{Error, Instance, SclPin, SdaPin};
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use crate::pac::gpio::vals::{Afr, Moder, Ot};
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use crate::pac::gpio::Gpio;
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use crate::pac::i2c;
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use crate::pac::i2c::I2c as I2cTrait;
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use crate::time::Hertz;
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pub struct I2c<'d, T: Instance> {
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//peri: T,
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scl: AnyPin,
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sda: AnyPin,
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phantom: PhantomData<&'d mut T>,
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}
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impl<'d, T: Instance> I2c<'d, T> {
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pub fn new<F>(
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pclk: Hertz,
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peri: impl Unborrow<Target = T> + 'd,
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_peri: impl Unborrow<Target = T> + 'd,
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scl: impl Unborrow<Target = impl SclPin<T>>,
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sda: impl Unborrow<Target = impl SdaPin<T>>,
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freq: F,
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@ -33,7 +27,6 @@ impl<'d, T: Instance> I2c<'d, T> {
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where
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F: Into<Hertz>,
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{
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unborrow!(peri);
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unborrow!(scl, sda);
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unsafe {
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@ -60,9 +53,6 @@ impl<'d, T: Instance> I2c<'d, T> {
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});
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}
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let scl = scl.degrade();
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let sda = sda.degrade();
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unsafe {
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T::regs().cr1().modify(|reg| {
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reg.set_pe(true);
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@ -70,8 +60,6 @@ impl<'d, T: Instance> I2c<'d, T> {
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}
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Self {
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scl,
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sda,
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phantom: PhantomData,
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}
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}
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@ -110,7 +98,7 @@ impl<'d, T: Instance> I2c<'d, T> {
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w.set_rd_wrn(i2c::vals::RdWrn::READ);
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w.set_nbytes(length as u8);
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w.set_start(i2c::vals::Start::START);
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w.set_autoend(i2c::vals::Autoend::AUTOMATIC);
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w.set_autoend(stop.autoend());
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});
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}
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}
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@ -29,7 +29,6 @@ impl WordSize {
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}
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pub struct Spi<'d, T: Instance> {
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//peri: T,
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sck: AnyPin,
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mosi: AnyPin,
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miso: AnyPin,
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@ -39,7 +38,7 @@ pub struct Spi<'d, T: Instance> {
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impl<'d, T: Instance> Spi<'d, T> {
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pub fn new<F>(
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pclk: Hertz,
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peri: impl Unborrow<Target = T> + 'd,
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_peri: impl Unborrow<Target = T> + 'd,
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sck: impl Unborrow<Target = impl SckPin<T>>,
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mosi: impl Unborrow<Target = impl MosiPin<T>>,
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miso: impl Unborrow<Target = impl MisoPin<T>>,
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@ -49,7 +48,6 @@ impl<'d, T: Instance> Spi<'d, T> {
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where
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F: Into<Hertz>,
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{
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unborrow!(peri);
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unborrow!(sck, mosi, miso);
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unsafe {
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@ -95,7 +93,6 @@ impl<'d, T: Instance> Spi<'d, T> {
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}
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Self {
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//peri,
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sck,
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mosi,
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miso,
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@ -20,7 +20,7 @@ impl WordSize {
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}
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}
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fn frxth(&self) -> spi::vals::Fthlv {
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fn _frxth(&self) -> spi::vals::Fthlv {
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match self {
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WordSize::EightBit => spi::vals::Fthlv::ONEFRAME,
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WordSize::SixteenBit => spi::vals::Fthlv::ONEFRAME,
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@ -29,7 +29,6 @@ impl WordSize {
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}
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pub struct Spi<'d, T: Instance> {
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//peri: T,
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sck: AnyPin,
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mosi: AnyPin,
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miso: AnyPin,
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@ -39,7 +38,7 @@ pub struct Spi<'d, T: Instance> {
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impl<'d, T: Instance> Spi<'d, T> {
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pub fn new<F>(
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pclk: Hertz,
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peri: impl Unborrow<Target = T> + 'd,
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_peri: impl Unborrow<Target = T> + 'd,
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sck: impl Unborrow<Target = impl SckPin<T>>,
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mosi: impl Unborrow<Target = impl MosiPin<T>>,
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miso: impl Unborrow<Target = impl MisoPin<T>>,
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@ -49,7 +48,6 @@ impl<'d, T: Instance> Spi<'d, T> {
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where
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F: Into<Hertz>,
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{
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unborrow!(peri);
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unborrow!(sck, mosi, miso);
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unsafe {
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@ -110,7 +108,6 @@ impl<'d, T: Instance> Spi<'d, T> {
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}
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Self {
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//peri,
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sck,
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mosi,
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miso,
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@ -218,7 +215,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
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Self::set_word_size(WordSize::EightBit);
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let regs = T::regs();
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for (i, word) in words.iter_mut().enumerate() {
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for word in words.iter_mut() {
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unsafe {
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regs.cr1().modify(|reg| {
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reg.set_ssi(false);
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@ -28,8 +28,8 @@ defmt-rtt = "0.2.0"
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cortex-m = "0.7.1"
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cortex-m-rt = "0.6.14"
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embedded-hal = { version = "0.2.4" }
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embedded-hal = { version = "0.2.4" }
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panic-probe = { version = "0.2.0", features= ["print-defmt"] }
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futures = { version = "0.3.8", default-features = false, features = ["async-await"] }
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rtt-target = { version = "0.3", features = ["cortex-m"] }
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heapless = { version = "0.7.1", default-features = false }
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heapless = { version = "0.7.1", default-features = false }
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