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Fix stm32 warnings

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This commit is contained in:
Rukai
2021-06-05 18:15:35 +10:00
parent 6f5c85c50f
commit 010b2b9497
9 changed files with 21 additions and 57 deletions
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5
embassy-stm32/src/spi/v2.rs
View File

@ -29,7 +29,6 @@ impl WordSize {
}
pub struct Spi<'d, T: Instance> {
//peri: T,
sck: AnyPin,
mosi: AnyPin,
miso: AnyPin,
@ -39,7 +38,7 @@ pub struct Spi<'d, T: Instance> {
impl<'d, T: Instance> Spi<'d, T> {
pub fn new<F>(
pclk: Hertz,
peri: impl Unborrow<Target = T> + 'd,
_peri: impl Unborrow<Target = T> + 'd,
sck: impl Unborrow<Target = impl SckPin<T>>,
mosi: impl Unborrow<Target = impl MosiPin<T>>,
miso: impl Unborrow<Target = impl MisoPin<T>>,
@ -49,7 +48,6 @@ impl<'d, T: Instance> Spi<'d, T> {
where
F: Into<Hertz>,
{
unborrow!(peri);
unborrow!(sck, mosi, miso);
unsafe {
@ -95,7 +93,6 @@ impl<'d, T: Instance> Spi<'d, T> {
}
Self {
//peri,
sck,
mosi,
miso,

9
embassy-stm32/src/spi/v3.rs
View File

@ -20,7 +20,7 @@ impl WordSize {
}
}
fn frxth(&self) -> spi::vals::Fthlv {
fn _frxth(&self) -> spi::vals::Fthlv {
match self {
WordSize::EightBit => spi::vals::Fthlv::ONEFRAME,
WordSize::SixteenBit => spi::vals::Fthlv::ONEFRAME,
@ -29,7 +29,6 @@ impl WordSize {
}
pub struct Spi<'d, T: Instance> {
//peri: T,
sck: AnyPin,
mosi: AnyPin,
miso: AnyPin,
@ -39,7 +38,7 @@ pub struct Spi<'d, T: Instance> {
impl<'d, T: Instance> Spi<'d, T> {
pub fn new<F>(
pclk: Hertz,
peri: impl Unborrow<Target = T> + 'd,
_peri: impl Unborrow<Target = T> + 'd,
sck: impl Unborrow<Target = impl SckPin<T>>,
mosi: impl Unborrow<Target = impl MosiPin<T>>,
miso: impl Unborrow<Target = impl MisoPin<T>>,
@ -49,7 +48,6 @@ impl<'d, T: Instance> Spi<'d, T> {
where
F: Into<Hertz>,
{
unborrow!(peri);
unborrow!(sck, mosi, miso);
unsafe {
@ -110,7 +108,6 @@ impl<'d, T: Instance> Spi<'d, T> {
}
Self {
//peri,
sck,
mosi,
miso,
@ -218,7 +215,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
Self::set_word_size(WordSize::EightBit);
let regs = T::regs();
for (i, word) in words.iter_mut().enumerate() {
for word in words.iter_mut() {
unsafe {
regs.cr1().modify(|reg| {
reg.set_ssi(false);