Fix stm32 warnings

This commit is contained in:
Rukai 2021-06-05 18:15:35 +10:00
parent 6f5c85c50f
commit 010b2b9497
9 changed files with 21 additions and 57 deletions

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@ -7,8 +7,7 @@ use crate::peripherals;
pub use _version::*; pub use _version::*;
pub(crate) mod sealed { pub(crate) mod sealed {
use super::*; use crate::gpio::OptionalPin;
use crate::gpio::{OptionalPin, Pin};
pub trait Instance { pub trait Instance {
fn regs() -> &'static crate::pac::dac::Dac; fn regs() -> &'static crate::pac::dac::Dac;

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@ -1,11 +1,12 @@
use crate::dac::{DacPin, Instance}; use crate::dac::{DacPin, Instance};
use crate::gpio::Pin; use crate::fmt::*;
use crate::gpio::{AnyPin, OptionalPin}; use crate::gpio::AnyPin;
use crate::pac::dac; use crate::pac::dac;
use core::marker::PhantomData; use core::marker::PhantomData;
use embassy::util::Unborrow; use embassy::util::Unborrow;
use embassy_extras::unborrow; use embassy_extras::unborrow;
#[derive(Debug, defmt::Format)]
pub enum Error { pub enum Error {
UnconfiguredChannel, UnconfiguredChannel,
InvalidValue, InvalidValue,
@ -77,7 +78,6 @@ pub enum Value {
} }
pub struct Dac<'d, T: Instance> { pub struct Dac<'d, T: Instance> {
//peri: T,
ch1: Option<AnyPin>, ch1: Option<AnyPin>,
ch2: Option<AnyPin>, ch2: Option<AnyPin>,
phantom: PhantomData<&'d mut T>, phantom: PhantomData<&'d mut T>,
@ -85,11 +85,10 @@ pub struct Dac<'d, T: Instance> {
impl<'d, T: Instance> Dac<'d, T> { impl<'d, T: Instance> Dac<'d, T> {
pub fn new( pub fn new(
peri: impl Unborrow<Target = T> + 'd, _peri: impl Unborrow<Target = T> + 'd,
ch1: impl Unborrow<Target = impl DacPin<T, 1>>, ch1: impl Unborrow<Target = impl DacPin<T, 1>>,
ch2: impl Unborrow<Target = impl DacPin<T, 2>>, ch2: impl Unborrow<Target = impl DacPin<T, 2>>,
) -> Self { ) -> Self {
unborrow!(peri);
unborrow!(ch1, ch2); unborrow!(ch1, ch2);
let ch1 = ch1.degrade_optional(); let ch1 = ch1.degrade_optional();
@ -110,13 +109,11 @@ impl<'d, T: Instance> Dac<'d, T> {
} }
} }
let mut dac = Self { Self {
ch1, ch1,
ch2, ch2,
phantom: PhantomData, phantom: PhantomData,
}; }
dac
} }
pub fn enable_channel(&mut self, ch: Channel) -> Result<(), Error> { pub fn enable_channel(&mut self, ch: Channel) -> Result<(), Error> {
@ -181,7 +178,7 @@ impl<'d, T: Instance> Dac<'d, T> {
if self.ch1.is_none() { if self.ch1.is_none() {
return Err(Error::UnconfiguredChannel); return Err(Error::UnconfiguredChannel);
} }
self.disable_channel(Channel::Ch1); unwrap!(self.disable_channel(Channel::Ch1));
unsafe { unsafe {
T::regs().cr().modify(|reg| { T::regs().cr().modify(|reg| {
reg.set_tsel1(trigger.tsel()); reg.set_tsel1(trigger.tsel());
@ -194,7 +191,7 @@ impl<'d, T: Instance> Dac<'d, T> {
if self.ch2.is_none() { if self.ch2.is_none() {
return Err(Error::UnconfiguredChannel); return Err(Error::UnconfiguredChannel);
} }
self.disable_channel(Channel::Ch2); unwrap!(self.disable_channel(Channel::Ch2));
unsafe { unsafe {
T::regs().cr().modify(|reg| { T::regs().cr().modify(|reg| {
reg.set_tsel2(trigger.tsel()); reg.set_tsel2(trigger.tsel());

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@ -35,6 +35,7 @@ impl State {
static STATE: State = State::new(); static STATE: State = State::new();
#[allow(unused)] // Used by usart/v1.rs which may or may not be enabled
pub(crate) async unsafe fn transfer_m2p( pub(crate) async unsafe fn transfer_m2p(
ch: &mut impl Channel, ch: &mut impl Channel,
ch_func: u8, ch_func: u8,

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@ -16,7 +16,6 @@ pub enum Error {
} }
pub(crate) mod sealed { pub(crate) mod sealed {
use super::*;
use crate::gpio::Pin; use crate::gpio::Pin;
pub trait Instance { pub trait Instance {

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@ -1,5 +1,3 @@
use crate::gpio::AnyPin;
use crate::gpio::Pin;
use crate::i2c::{Error, Instance, SclPin, SdaPin}; use crate::i2c::{Error, Instance, SclPin, SdaPin};
use crate::time::Hertz; use crate::time::Hertz;
use core::marker::PhantomData; use core::marker::PhantomData;
@ -10,24 +8,18 @@ use embedded_hal::blocking::i2c::Write;
use embedded_hal::blocking::i2c::WriteRead; use embedded_hal::blocking::i2c::WriteRead;
use crate::pac::i2c; use crate::pac::i2c;
use crate::pac::i2c::I2c as I2cTrait;
use core::cmp;
use crate::pac::gpio::vals::{Afr, Moder, Ot}; use crate::pac::gpio::vals::{Afr, Moder, Ot};
use crate::pac::gpio::Gpio; use crate::pac::gpio::Gpio;
use core::ops::Deref;
pub struct I2c<'d, T: Instance> { pub struct I2c<'d, T: Instance> {
//peri: T,
scl: AnyPin,
sda: AnyPin,
phantom: PhantomData<&'d mut T>, phantom: PhantomData<&'d mut T>,
} }
impl<'d, T: Instance> I2c<'d, T> { impl<'d, T: Instance> I2c<'d, T> {
pub fn new<F>( pub fn new<F>(
pclk: Hertz, pclk: Hertz,
peri: impl Unborrow<Target = T> + 'd, _peri: impl Unborrow<Target = T> + 'd,
scl: impl Unborrow<Target = impl SclPin<T>>, scl: impl Unborrow<Target = impl SclPin<T>>,
sda: impl Unborrow<Target = impl SdaPin<T>>, sda: impl Unborrow<Target = impl SdaPin<T>>,
freq: F, freq: F,
@ -35,7 +27,6 @@ impl<'d, T: Instance> I2c<'d, T> {
where where
F: Into<Hertz>, F: Into<Hertz>,
{ {
unborrow!(peri);
unborrow!(scl, sda); unborrow!(scl, sda);
unsafe { unsafe {
@ -66,9 +57,6 @@ impl<'d, T: Instance> I2c<'d, T> {
}); });
} }
let scl = scl.degrade();
let sda = sda.degrade();
unsafe { unsafe {
T::regs().cr1().modify(|reg| { T::regs().cr1().modify(|reg| {
reg.set_pe(true); reg.set_pe(true);
@ -76,8 +64,6 @@ impl<'d, T: Instance> I2c<'d, T> {
} }
Self { Self {
scl,
sda,
phantom: PhantomData, phantom: PhantomData,
} }
} }
@ -261,7 +247,7 @@ impl<'d, T: Instance> Read for I2c<'d, T> {
*last = unsafe { self.recv_byte()? }; *last = unsafe { self.recv_byte()? };
// Wait for the STOP to be sent. // Wait for the STOP to be sent.
while { unsafe { T::regs().cr1().read().stop() == i2c::vals::Stop::STOP } } {} while unsafe { T::regs().cr1().read().stop() == i2c::vals::Stop::STOP } {}
// Fallthrough is success // Fallthrough is success
Ok(()) Ok(())
@ -282,7 +268,7 @@ impl<'d, T: Instance> Write for I2c<'d, T> {
.cr1() .cr1()
.modify(|reg| reg.set_stop(i2c::vals::Stop::STOP)); .modify(|reg| reg.set_stop(i2c::vals::Stop::STOP));
// Wait for STOP condition to transmit. // Wait for STOP condition to transmit.
while { unsafe { T::regs().cr1().read().stop() == i2c::vals::Stop::STOP } } {} while T::regs().cr1().read().stop() == i2c::vals::Stop::STOP {}
}; };
// Fallthrough is success // Fallthrough is success

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@ -6,26 +6,20 @@ use embedded_hal::blocking::i2c::Read;
use embedded_hal::blocking::i2c::Write; use embedded_hal::blocking::i2c::Write;
use embedded_hal::blocking::i2c::WriteRead; use embedded_hal::blocking::i2c::WriteRead;
use crate::gpio::AnyPin;
use crate::gpio::Pin;
use crate::i2c::{Error, Instance, SclPin, SdaPin}; use crate::i2c::{Error, Instance, SclPin, SdaPin};
use crate::pac::gpio::vals::{Afr, Moder, Ot}; use crate::pac::gpio::vals::{Afr, Moder, Ot};
use crate::pac::gpio::Gpio; use crate::pac::gpio::Gpio;
use crate::pac::i2c; use crate::pac::i2c;
use crate::pac::i2c::I2c as I2cTrait;
use crate::time::Hertz; use crate::time::Hertz;
pub struct I2c<'d, T: Instance> { pub struct I2c<'d, T: Instance> {
//peri: T,
scl: AnyPin,
sda: AnyPin,
phantom: PhantomData<&'d mut T>, phantom: PhantomData<&'d mut T>,
} }
impl<'d, T: Instance> I2c<'d, T> { impl<'d, T: Instance> I2c<'d, T> {
pub fn new<F>( pub fn new<F>(
pclk: Hertz, pclk: Hertz,
peri: impl Unborrow<Target = T> + 'd, _peri: impl Unborrow<Target = T> + 'd,
scl: impl Unborrow<Target = impl SclPin<T>>, scl: impl Unborrow<Target = impl SclPin<T>>,
sda: impl Unborrow<Target = impl SdaPin<T>>, sda: impl Unborrow<Target = impl SdaPin<T>>,
freq: F, freq: F,
@ -33,7 +27,6 @@ impl<'d, T: Instance> I2c<'d, T> {
where where
F: Into<Hertz>, F: Into<Hertz>,
{ {
unborrow!(peri);
unborrow!(scl, sda); unborrow!(scl, sda);
unsafe { unsafe {
@ -60,9 +53,6 @@ impl<'d, T: Instance> I2c<'d, T> {
}); });
} }
let scl = scl.degrade();
let sda = sda.degrade();
unsafe { unsafe {
T::regs().cr1().modify(|reg| { T::regs().cr1().modify(|reg| {
reg.set_pe(true); reg.set_pe(true);
@ -70,8 +60,6 @@ impl<'d, T: Instance> I2c<'d, T> {
} }
Self { Self {
scl,
sda,
phantom: PhantomData, phantom: PhantomData,
} }
} }
@ -110,7 +98,7 @@ impl<'d, T: Instance> I2c<'d, T> {
w.set_rd_wrn(i2c::vals::RdWrn::READ); w.set_rd_wrn(i2c::vals::RdWrn::READ);
w.set_nbytes(length as u8); w.set_nbytes(length as u8);
w.set_start(i2c::vals::Start::START); w.set_start(i2c::vals::Start::START);
w.set_autoend(i2c::vals::Autoend::AUTOMATIC); w.set_autoend(stop.autoend());
}); });
} }
} }

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@ -29,7 +29,6 @@ impl WordSize {
} }
pub struct Spi<'d, T: Instance> { pub struct Spi<'d, T: Instance> {
//peri: T,
sck: AnyPin, sck: AnyPin,
mosi: AnyPin, mosi: AnyPin,
miso: AnyPin, miso: AnyPin,
@ -39,7 +38,7 @@ pub struct Spi<'d, T: Instance> {
impl<'d, T: Instance> Spi<'d, T> { impl<'d, T: Instance> Spi<'d, T> {
pub fn new<F>( pub fn new<F>(
pclk: Hertz, pclk: Hertz,
peri: impl Unborrow<Target = T> + 'd, _peri: impl Unborrow<Target = T> + 'd,
sck: impl Unborrow<Target = impl SckPin<T>>, sck: impl Unborrow<Target = impl SckPin<T>>,
mosi: impl Unborrow<Target = impl MosiPin<T>>, mosi: impl Unborrow<Target = impl MosiPin<T>>,
miso: impl Unborrow<Target = impl MisoPin<T>>, miso: impl Unborrow<Target = impl MisoPin<T>>,
@ -49,7 +48,6 @@ impl<'d, T: Instance> Spi<'d, T> {
where where
F: Into<Hertz>, F: Into<Hertz>,
{ {
unborrow!(peri);
unborrow!(sck, mosi, miso); unborrow!(sck, mosi, miso);
unsafe { unsafe {
@ -95,7 +93,6 @@ impl<'d, T: Instance> Spi<'d, T> {
} }
Self { Self {
//peri,
sck, sck,
mosi, mosi,
miso, miso,

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@ -20,7 +20,7 @@ impl WordSize {
} }
} }
fn frxth(&self) -> spi::vals::Fthlv { fn _frxth(&self) -> spi::vals::Fthlv {
match self { match self {
WordSize::EightBit => spi::vals::Fthlv::ONEFRAME, WordSize::EightBit => spi::vals::Fthlv::ONEFRAME,
WordSize::SixteenBit => spi::vals::Fthlv::ONEFRAME, WordSize::SixteenBit => spi::vals::Fthlv::ONEFRAME,
@ -29,7 +29,6 @@ impl WordSize {
} }
pub struct Spi<'d, T: Instance> { pub struct Spi<'d, T: Instance> {
//peri: T,
sck: AnyPin, sck: AnyPin,
mosi: AnyPin, mosi: AnyPin,
miso: AnyPin, miso: AnyPin,
@ -39,7 +38,7 @@ pub struct Spi<'d, T: Instance> {
impl<'d, T: Instance> Spi<'d, T> { impl<'d, T: Instance> Spi<'d, T> {
pub fn new<F>( pub fn new<F>(
pclk: Hertz, pclk: Hertz,
peri: impl Unborrow<Target = T> + 'd, _peri: impl Unborrow<Target = T> + 'd,
sck: impl Unborrow<Target = impl SckPin<T>>, sck: impl Unborrow<Target = impl SckPin<T>>,
mosi: impl Unborrow<Target = impl MosiPin<T>>, mosi: impl Unborrow<Target = impl MosiPin<T>>,
miso: impl Unborrow<Target = impl MisoPin<T>>, miso: impl Unborrow<Target = impl MisoPin<T>>,
@ -49,7 +48,6 @@ impl<'d, T: Instance> Spi<'d, T> {
where where
F: Into<Hertz>, F: Into<Hertz>,
{ {
unborrow!(peri);
unborrow!(sck, mosi, miso); unborrow!(sck, mosi, miso);
unsafe { unsafe {
@ -110,7 +108,6 @@ impl<'d, T: Instance> Spi<'d, T> {
} }
Self { Self {
//peri,
sck, sck,
mosi, mosi,
miso, miso,
@ -218,7 +215,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
Self::set_word_size(WordSize::EightBit); Self::set_word_size(WordSize::EightBit);
let regs = T::regs(); let regs = T::regs();
for (i, word) in words.iter_mut().enumerate() { for word in words.iter_mut() {
unsafe { unsafe {
regs.cr1().modify(|reg| { regs.cr1().modify(|reg| {
reg.set_ssi(false); reg.set_ssi(false);

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@ -28,8 +28,8 @@ defmt-rtt = "0.2.0"
cortex-m = "0.7.1" cortex-m = "0.7.1"
cortex-m-rt = "0.6.14" cortex-m-rt = "0.6.14"
embedded-hal = { version = "0.2.4" } embedded-hal = { version = "0.2.4" }
panic-probe = { version = "0.2.0", features= ["print-defmt"] } panic-probe = { version = "0.2.0", features= ["print-defmt"] }
futures = { version = "0.3.8", default-features = false, features = ["async-await"] } futures = { version = "0.3.8", default-features = false, features = ["async-await"] }
rtt-target = { version = "0.3", features = ["cortex-m"] } rtt-target = { version = "0.3", features = ["cortex-m"] }
heapless = { version = "0.7.1", default-features = false } heapless = { version = "0.7.1", default-features = false }