Merge #1345
1345: Added a neopixel constructor to spi, with an example in the stm32g0 d… r=Dirbaio a=smeenka For Spi I added the possibility to use the Spi device as a Neopixel driver, with very precise timing, and not dependent on software during the transfer. Even without the --release flag, the timing is perfect. Note that between the bursts of data the Mosi line should stay on low level. A resistor of 10k can guarantee that, as it seems the the pin is floating between the bursts (on the nucleo-G070RB platform I use). I created an example for the STM32G0 family. This example does contain a very simple Neopixel driver, only for one type. But this Neopixel driver can easy be adapted to different types (for example RGBW types). Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net> Co-authored-by: anton smeenk <asmeenk@planet.nl>
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08d9e5981e
@ -9,7 +9,8 @@ use embassy_cortex_m::interrupt::Priority;
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use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use super::{Dir, Word, WordSize};
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::BDMA_CHANNEL_COUNT;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::pac;
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@ -167,7 +168,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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ptr as *mut u32,
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len,
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true,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -202,7 +203,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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ptr as *mut u32,
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len,
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true,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -225,7 +226,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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repeated as *const W as *mut u32,
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count,
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false,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -9,7 +9,8 @@ use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use pac::dma::regs;
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use super::{Dir, Word, WordSize};
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::DMA_CHANNEL_COUNT;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::pac::dma::vals;
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@ -246,7 +247,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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ptr as *mut u32,
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len,
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true,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -281,7 +282,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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ptr as *mut u32,
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len,
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true,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -304,7 +305,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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repeated as *const W as *mut u32,
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count,
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false,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -464,7 +465,7 @@ impl<'a, C: Channel, W: Word> DoubleBuffered<'a, C, W> {
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assert!(len > 0 && len <= 0xFFFF);
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let dir = Dir::PeripheralToMemory;
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let data_size = W::bits();
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let data_size = W::size();
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let channel_number = channel.num();
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let dma = channel.regs();
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@ -9,7 +9,8 @@ use embassy_cortex_m::interrupt::Priority;
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use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use super::{Dir, Word, WordSize};
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::GPDMA_CHANNEL_COUNT;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::pac;
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@ -165,7 +166,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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ptr as *mut u32,
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len,
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true,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -200,7 +201,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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ptr as *mut u32,
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len,
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true,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -223,7 +224,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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repeated as *const W as *mut u32,
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count,
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false,
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W::bits(),
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W::size(),
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options,
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)
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}
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@ -21,6 +21,8 @@ pub use gpdma::*;
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#[cfg(dmamux)]
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mod dmamux;
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pub mod word;
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use core::mem;
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use embassy_cortex_m::interrupt::Priority;
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@ -36,53 +38,6 @@ enum Dir {
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PeripheralToMemory,
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}
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum WordSize {
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OneByte,
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TwoBytes,
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FourBytes,
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}
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impl WordSize {
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pub fn bytes(&self) -> usize {
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match self {
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Self::OneByte => 1,
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Self::TwoBytes => 2,
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Self::FourBytes => 4,
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}
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}
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}
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mod word_sealed {
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pub trait Word {}
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}
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pub trait Word: word_sealed::Word {
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fn bits() -> WordSize;
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}
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impl word_sealed::Word for u8 {}
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impl Word for u8 {
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fn bits() -> WordSize {
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WordSize::OneByte
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}
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}
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impl word_sealed::Word for u16 {}
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impl Word for u16 {
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fn bits() -> WordSize {
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WordSize::TwoBytes
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}
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}
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impl word_sealed::Word for u32 {}
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impl Word for u32 {
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fn bits() -> WordSize {
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WordSize::FourBytes
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}
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}
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pub struct NoDma;
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impl_peripheral!(NoDma);
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79
embassy-stm32/src/dma/word.rs
Normal file
79
embassy-stm32/src/dma/word.rs
Normal file
@ -0,0 +1,79 @@
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum WordSize {
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OneByte,
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TwoBytes,
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FourBytes,
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}
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impl WordSize {
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pub fn bytes(&self) -> usize {
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match self {
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Self::OneByte => 1,
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Self::TwoBytes => 2,
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Self::FourBytes => 4,
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}
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}
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}
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mod sealed {
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pub trait Word {}
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}
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pub trait Word: sealed::Word + Default + Copy + 'static {
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fn size() -> WordSize;
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fn bits() -> usize;
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}
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macro_rules! impl_word {
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(_, $T:ident, $bits:literal, $size:ident) => {
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impl sealed::Word for $T {}
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impl Word for $T {
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fn bits() -> usize {
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$bits
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}
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fn size() -> WordSize {
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WordSize::$size
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}
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}
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};
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($T:ident, $uX:ident, $bits:literal, $size:ident) => {
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#[repr(transparent)]
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#[derive(Copy, Clone, Default)]
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pub struct $T(pub $uX);
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impl_word!(_, $T, $bits, $size);
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};
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}
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impl_word!(U1, u8, 1, OneByte);
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impl_word!(U2, u8, 2, OneByte);
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impl_word!(U3, u8, 3, OneByte);
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impl_word!(U4, u8, 4, OneByte);
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impl_word!(U5, u8, 5, OneByte);
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impl_word!(U6, u8, 6, OneByte);
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impl_word!(U7, u8, 7, OneByte);
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impl_word!(_, u8, 8, OneByte);
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impl_word!(U9, u16, 9, TwoBytes);
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impl_word!(U10, u16, 10, TwoBytes);
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impl_word!(U11, u16, 11, TwoBytes);
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impl_word!(U12, u16, 12, TwoBytes);
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impl_word!(U13, u16, 13, TwoBytes);
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impl_word!(U14, u16, 14, TwoBytes);
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impl_word!(U15, u16, 15, TwoBytes);
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impl_word!(_, u16, 16, TwoBytes);
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impl_word!(U17, u32, 17, FourBytes);
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impl_word!(U18, u32, 18, FourBytes);
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impl_word!(U19, u32, 19, FourBytes);
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impl_word!(U20, u32, 20, FourBytes);
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impl_word!(U21, u32, 21, FourBytes);
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impl_word!(U22, u32, 22, FourBytes);
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impl_word!(U23, u32, 23, FourBytes);
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impl_word!(U24, u32, 24, FourBytes);
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impl_word!(U25, u32, 25, FourBytes);
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impl_word!(U26, u32, 26, FourBytes);
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impl_word!(U27, u32, 27, FourBytes);
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impl_word!(U28, u32, 28, FourBytes);
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impl_word!(U29, u32, 29, FourBytes);
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impl_word!(U30, u32, 30, FourBytes);
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impl_word!(U31, u32, 31, FourBytes);
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impl_word!(_, u32, 32, FourBytes);
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@ -7,8 +7,7 @@ use embassy_futures::join::join;
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use embassy_hal_common::{into_ref, PeripheralRef};
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pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
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use self::sealed::WordSize;
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use crate::dma::{slice_ptr_parts, Transfer};
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use crate::dma::{slice_ptr_parts, word, Transfer};
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use crate::gpio::sealed::{AFType, Pin as _};
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use crate::gpio::{AnyPin, Pull};
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use crate::pac::spi::{regs, vals, Spi as Regs};
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@ -78,7 +77,7 @@ pub struct Spi<'d, T: Instance, Tx, Rx> {
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miso: Option<PeripheralRef<'d, AnyPin>>,
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txdma: PeripheralRef<'d, Tx>,
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rxdma: PeripheralRef<'d, Rx>,
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current_word_size: WordSize,
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current_word_size: word_impl::Config,
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}
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impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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@ -178,6 +177,23 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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)
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}
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pub fn new_txonly_nosck(
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peri: impl Peripheral<P = T> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
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txdma: impl Peripheral<P = Tx> + 'd,
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rxdma: impl Peripheral<P = Rx> + 'd, // TODO: remove
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freq: Hertz,
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config: Config,
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) -> Self {
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into_ref!(mosi);
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unsafe {
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mosi.set_as_af_pull(mosi.af_num(), AFType::OutputPushPull, Pull::Down);
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mosi.set_speed(crate::gpio::Speed::Medium);
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}
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Self::new_inner(peri, None, Some(mosi.map_into()), None, txdma, rxdma, freq, config)
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}
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/// Useful for on chip peripherals like SUBGHZ which are hardwired.
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/// The bus can optionally be exposed externally with `Spi::new()` still.
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#[allow(dead_code)]
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@ -234,14 +250,15 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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if mosi.is_none() {
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w.set_rxonly(vals::Rxonly::OUTPUTDISABLED);
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}
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w.set_dff(WordSize::EightBit.dff())
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w.set_dff(<u8 as sealed::Word>::CONFIG)
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});
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}
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#[cfg(spi_v2)]
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unsafe {
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T::REGS.cr2().modify(|w| {
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w.set_frxth(WordSize::EightBit.frxth());
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w.set_ds(WordSize::EightBit.ds());
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let (ds, frxth) = <u8 as sealed::Word>::CONFIG;
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w.set_frxth(frxth);
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w.set_ds(ds);
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w.set_ssoe(false);
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});
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T::REGS.cr1().modify(|w| {
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@ -279,7 +296,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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T::REGS.cfg1().modify(|w| {
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w.set_crcen(false);
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w.set_mbr(br);
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w.set_dsize(WordSize::EightBit.dsize());
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w.set_dsize(<u8 as sealed::Word>::CONFIG);
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w.set_fthlv(vals::Fthlv::ONEFRAME);
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});
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T::REGS.cr2().modify(|w| {
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w.set_tsize(0);
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@ -297,7 +315,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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miso,
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txdma,
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rxdma,
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current_word_size: WordSize::EightBit,
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current_word_size: <u8 as sealed::Word>::CONFIG,
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}
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}
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@ -355,7 +373,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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}
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}
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fn set_word_size(&mut self, word_size: WordSize) {
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fn set_word_size(&mut self, word_size: word_impl::Config) {
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if self.current_word_size == word_size {
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return;
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}
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@ -364,7 +382,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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unsafe {
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T::REGS.cr1().modify(|reg| {
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reg.set_spe(false);
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reg.set_dff(word_size.dff())
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reg.set_dff(word_size)
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});
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T::REGS.cr1().modify(|reg| {
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reg.set_spe(true);
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@ -376,8 +394,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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w.set_spe(false);
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});
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T::REGS.cr2().modify(|w| {
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w.set_frxth(word_size.frxth());
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w.set_ds(word_size.ds());
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w.set_frxth(word_size.1);
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w.set_ds(word_size.0);
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});
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T::REGS.cr1().modify(|w| {
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w.set_spe(true);
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@ -393,7 +411,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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w.set_spe(false);
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});
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T::REGS.cfg1().modify(|w| {
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w.set_dsize(word_size.dsize());
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w.set_dsize(word_size);
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});
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T::REGS.cr1().modify(|w| {
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w.set_csusp(false);
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@ -412,7 +430,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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return Ok(());
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}
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self.set_word_size(W::WORDSIZE);
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self.set_word_size(W::CONFIG);
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unsafe {
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T::REGS.cr1().modify(|w| {
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w.set_spe(false);
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@ -450,7 +468,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
|
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return Ok(());
|
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}
|
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|
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self.set_word_size(W::WORDSIZE);
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self.set_word_size(W::CONFIG);
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unsafe {
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T::REGS.cr1().modify(|w| {
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w.set_spe(false);
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@ -513,7 +531,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
|
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return Ok(());
|
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}
|
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|
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self.set_word_size(W::WORDSIZE);
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self.set_word_size(W::CONFIG);
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unsafe {
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T::REGS.cr1().modify(|w| {
|
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w.set_spe(false);
|
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@ -571,7 +589,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
|
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pub fn blocking_write<W: Word>(&mut self, words: &[W]) -> Result<(), Error> {
|
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unsafe { T::REGS.cr1().modify(|w| w.set_spe(true)) }
|
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flush_rx_fifo(T::REGS);
|
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self.set_word_size(W::WORDSIZE);
|
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self.set_word_size(W::CONFIG);
|
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for word in words.iter() {
|
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let _ = transfer_word(T::REGS, *word)?;
|
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}
|
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@ -581,7 +599,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
|
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pub fn blocking_read<W: Word>(&mut self, words: &mut [W]) -> Result<(), Error> {
|
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unsafe { T::REGS.cr1().modify(|w| w.set_spe(true)) }
|
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flush_rx_fifo(T::REGS);
|
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self.set_word_size(W::WORDSIZE);
|
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self.set_word_size(W::CONFIG);
|
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for word in words.iter_mut() {
|
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*word = transfer_word(T::REGS, W::default())?;
|
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}
|
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@ -591,7 +609,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
|
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pub fn blocking_transfer_in_place<W: Word>(&mut self, words: &mut [W]) -> Result<(), Error> {
|
||||
unsafe { T::REGS.cr1().modify(|w| w.set_spe(true)) }
|
||||
flush_rx_fifo(T::REGS);
|
||||
self.set_word_size(W::WORDSIZE);
|
||||
self.set_word_size(W::CONFIG);
|
||||
for word in words.iter_mut() {
|
||||
*word = transfer_word(T::REGS, *word)?;
|
||||
}
|
||||
@ -601,7 +619,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
|
||||
pub fn blocking_transfer<W: Word>(&mut self, read: &mut [W], write: &[W]) -> Result<(), Error> {
|
||||
unsafe { T::REGS.cr1().modify(|w| w.set_spe(true)) }
|
||||
flush_rx_fifo(T::REGS);
|
||||
self.set_word_size(W::WORDSIZE);
|
||||
self.set_word_size(W::CONFIG);
|
||||
let len = read.len().max(write.len());
|
||||
for i in 0..len {
|
||||
let wb = write.get(i).copied().unwrap_or_default();
|
||||
@ -933,70 +951,89 @@ pub(crate) mod sealed {
|
||||
const REGS: Regs;
|
||||
}
|
||||
|
||||
pub trait Word: Copy + 'static {
|
||||
const WORDSIZE: WordSize;
|
||||
}
|
||||
|
||||
impl Word for u8 {
|
||||
const WORDSIZE: WordSize = WordSize::EightBit;
|
||||
}
|
||||
impl Word for u16 {
|
||||
const WORDSIZE: WordSize = WordSize::SixteenBit;
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone, PartialOrd, PartialEq)]
|
||||
pub enum WordSize {
|
||||
EightBit,
|
||||
SixteenBit,
|
||||
}
|
||||
|
||||
impl WordSize {
|
||||
#[cfg(any(spi_v1, spi_f1))]
|
||||
pub fn dff(&self) -> vals::Dff {
|
||||
match self {
|
||||
WordSize::EightBit => vals::Dff::EIGHTBIT,
|
||||
WordSize::SixteenBit => vals::Dff::SIXTEENBIT,
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(spi_v2)]
|
||||
pub fn ds(&self) -> vals::Ds {
|
||||
match self {
|
||||
WordSize::EightBit => vals::Ds::EIGHTBIT,
|
||||
WordSize::SixteenBit => vals::Ds::SIXTEENBIT,
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(spi_v2)]
|
||||
pub fn frxth(&self) -> vals::Frxth {
|
||||
match self {
|
||||
WordSize::EightBit => vals::Frxth::QUARTER,
|
||||
WordSize::SixteenBit => vals::Frxth::HALF,
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(any(spi_v3, spi_v4, spi_v5))]
|
||||
pub fn dsize(&self) -> u8 {
|
||||
match self {
|
||||
WordSize::EightBit => 0b0111,
|
||||
WordSize::SixteenBit => 0b1111,
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(any(spi_v3, spi_v4, spi_v5))]
|
||||
pub fn _frxth(&self) -> vals::Fthlv {
|
||||
match self {
|
||||
WordSize::EightBit => vals::Fthlv::ONEFRAME,
|
||||
WordSize::SixteenBit => vals::Fthlv::ONEFRAME,
|
||||
}
|
||||
}
|
||||
pub trait Word {
|
||||
const CONFIG: word_impl::Config;
|
||||
}
|
||||
}
|
||||
|
||||
pub trait Word: Copy + 'static + sealed::Word + Default + crate::dma::Word {}
|
||||
pub trait Word: word::Word + sealed::Word {}
|
||||
|
||||
impl Word for u8 {}
|
||||
impl Word for u16 {}
|
||||
macro_rules! impl_word {
|
||||
($T:ty, $config:expr) => {
|
||||
impl sealed::Word for $T {
|
||||
const CONFIG: Config = $config;
|
||||
}
|
||||
impl Word for $T {}
|
||||
};
|
||||
}
|
||||
|
||||
#[cfg(any(spi_v1, spi_f1))]
|
||||
mod word_impl {
|
||||
use super::*;
|
||||
|
||||
pub type Config = vals::Dff;
|
||||
|
||||
impl_word!(u8, vals::Dff::EIGHTBIT);
|
||||
impl_word!(u16, vals::Dff::SIXTEENBIT);
|
||||
}
|
||||
|
||||
#[cfg(any(spi_v2))]
|
||||
mod word_impl {
|
||||
use super::*;
|
||||
|
||||
pub type Config = (vals::Ds, vals::Frxth);
|
||||
|
||||
impl_word!(word::U4, (vals::Ds::FOURBIT, vals::Frxth::QUARTER));
|
||||
impl_word!(word::U5, (vals::Ds::FIVEBIT, vals::Frxth::QUARTER));
|
||||
impl_word!(word::U6, (vals::Ds::SIXBIT, vals::Frxth::QUARTER));
|
||||
impl_word!(word::U7, (vals::Ds::SEVENBIT, vals::Frxth::QUARTER));
|
||||
impl_word!(u8, (vals::Ds::EIGHTBIT, vals::Frxth::QUARTER));
|
||||
impl_word!(word::U9, (vals::Ds::NINEBIT, vals::Frxth::HALF));
|
||||
impl_word!(word::U10, (vals::Ds::TENBIT, vals::Frxth::HALF));
|
||||
impl_word!(word::U11, (vals::Ds::ELEVENBIT, vals::Frxth::HALF));
|
||||
impl_word!(word::U12, (vals::Ds::TWELVEBIT, vals::Frxth::HALF));
|
||||
impl_word!(word::U13, (vals::Ds::THIRTEENBIT, vals::Frxth::HALF));
|
||||
impl_word!(word::U14, (vals::Ds::FOURTEENBIT, vals::Frxth::HALF));
|
||||
impl_word!(word::U15, (vals::Ds::FIFTEENBIT, vals::Frxth::HALF));
|
||||
impl_word!(u16, (vals::Ds::SIXTEENBIT, vals::Frxth::HALF));
|
||||
}
|
||||
|
||||
#[cfg(any(spi_v3, spi_v4, spi_v5))]
|
||||
mod word_impl {
|
||||
use super::*;
|
||||
|
||||
pub type Config = u8;
|
||||
|
||||
impl_word!(word::U4, 4 - 1);
|
||||
impl_word!(word::U5, 5 - 1);
|
||||
impl_word!(word::U6, 6 - 1);
|
||||
impl_word!(word::U7, 7 - 1);
|
||||
impl_word!(u8, 8 - 1);
|
||||
impl_word!(word::U9, 9 - 1);
|
||||
impl_word!(word::U10, 10 - 1);
|
||||
impl_word!(word::U11, 11 - 1);
|
||||
impl_word!(word::U12, 12 - 1);
|
||||
impl_word!(word::U13, 13 - 1);
|
||||
impl_word!(word::U14, 14 - 1);
|
||||
impl_word!(word::U15, 15 - 1);
|
||||
impl_word!(u16, 16 - 1);
|
||||
impl_word!(word::U17, 17 - 1);
|
||||
impl_word!(word::U18, 18 - 1);
|
||||
impl_word!(word::U19, 19 - 1);
|
||||
impl_word!(word::U20, 20 - 1);
|
||||
impl_word!(word::U21, 21 - 1);
|
||||
impl_word!(word::U22, 22 - 1);
|
||||
impl_word!(word::U23, 23 - 1);
|
||||
impl_word!(word::U24, 24 - 1);
|
||||
impl_word!(word::U25, 25 - 1);
|
||||
impl_word!(word::U26, 26 - 1);
|
||||
impl_word!(word::U27, 27 - 1);
|
||||
impl_word!(word::U28, 28 - 1);
|
||||
impl_word!(word::U29, 29 - 1);
|
||||
impl_word!(word::U30, 30 - 1);
|
||||
impl_word!(word::U31, 31 - 1);
|
||||
impl_word!(u32, 32 - 1);
|
||||
}
|
||||
|
||||
pub trait Instance: Peripheral<P = Self> + sealed::Instance + RccPeripheral {}
|
||||
pin_trait!(SckPin, Instance);
|
||||
|
||||
101
examples/stm32g0/src/bin/spi_neopixel.rs
Normal file
101
examples/stm32g0/src/bin/spi_neopixel.rs
Normal file
@ -0,0 +1,101 @@
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
use defmt::*;
|
||||
use embassy_executor::Spawner;
|
||||
use embassy_stm32::dma::word::U5;
|
||||
use embassy_stm32::dma::NoDma;
|
||||
use embassy_stm32::spi::{Config, Spi};
|
||||
use embassy_stm32::time::Hertz;
|
||||
use embassy_time::{Duration, Timer};
|
||||
use {defmt_rtt as _, panic_probe as _};
|
||||
|
||||
const NR_PIXELS: usize = 15;
|
||||
const BITS_PER_PIXEL: usize = 24; // 24 for rgb, 32 for rgbw
|
||||
const TOTAL_BITS: usize = NR_PIXELS * BITS_PER_PIXEL;
|
||||
|
||||
struct RGB {
|
||||
r: u8,
|
||||
g: u8,
|
||||
b: u8,
|
||||
}
|
||||
impl Default for RGB {
|
||||
fn default() -> RGB {
|
||||
RGB { r: 0, g: 0, b: 0 }
|
||||
}
|
||||
}
|
||||
pub struct Ws2812 {
|
||||
// Note that the U5 type controls the selection of 5 bits to output
|
||||
bitbuffer: [U5; TOTAL_BITS],
|
||||
}
|
||||
|
||||
impl Ws2812 {
|
||||
pub fn new() -> Ws2812 {
|
||||
Ws2812 {
|
||||
bitbuffer: [U5(0); TOTAL_BITS],
|
||||
}
|
||||
}
|
||||
fn len(&self) -> usize {
|
||||
return NR_PIXELS;
|
||||
}
|
||||
fn set(&mut self, idx: usize, rgb: RGB) {
|
||||
self.render_color(idx, 0, rgb.g);
|
||||
self.render_color(idx, 8, rgb.r);
|
||||
self.render_color(idx, 16, rgb.b);
|
||||
}
|
||||
// transform one color byte into an array of 8 byte. Each byte in the array does represent 1 neopixel bit pattern
|
||||
fn render_color(&mut self, pixel_idx: usize, offset: usize, color: u8) {
|
||||
let mut bits = color as usize;
|
||||
let mut idx = pixel_idx * BITS_PER_PIXEL + offset;
|
||||
|
||||
// render one bit in one spi byte. High time first, then the low time
|
||||
// clock should be 4 Mhz, 5 bits, each bit is 0.25 us.
|
||||
// a one bit is send as a pulse of 0.75 high -- 0.50 low
|
||||
// a zero bit is send as a pulse of 0.50 high -- 0.75 low
|
||||
// clock frequency for the neopixel is exact 800 khz
|
||||
// note that the mosi output should have a resistor to ground of 10k,
|
||||
// to assure that between the bursts the line is low
|
||||
for _i in 0..8 {
|
||||
if idx >= TOTAL_BITS {
|
||||
return;
|
||||
}
|
||||
let pattern = match bits & 0x80 {
|
||||
0x80 => 0b0000_1110,
|
||||
_ => 0b000_1100,
|
||||
};
|
||||
bits = bits << 1;
|
||||
self.bitbuffer[idx] = U5(pattern);
|
||||
idx += 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#[embassy_executor::main]
|
||||
async fn main(_spawner: Spawner) {
|
||||
let p = embassy_stm32::init(Default::default());
|
||||
info!("Start test using spi as neopixel driver");
|
||||
|
||||
let mut spi = Spi::new_txonly_nosck(p.SPI1, p.PB5, p.DMA1_CH3, NoDma, Hertz(4_000_000), Config::default());
|
||||
|
||||
let mut neopixels = Ws2812::new();
|
||||
|
||||
loop {
|
||||
let mut cnt: usize = 0;
|
||||
for _i in 0..10 {
|
||||
for idx in 0..neopixels.len() {
|
||||
let color = match (cnt + idx) % 3 {
|
||||
0 => RGB { r: 0x21, g: 0, b: 0 },
|
||||
1 => RGB { r: 0, g: 0x31, b: 0 },
|
||||
_ => RGB { r: 0, g: 0, b: 0x41 },
|
||||
};
|
||||
neopixels.set(idx, color);
|
||||
}
|
||||
cnt += 1;
|
||||
// start sending the neopixel bit patters over spi to the neopixel string
|
||||
spi.write(&neopixels.bitbuffer).await.ok();
|
||||
Timer::after(Duration::from_millis(500)).await;
|
||||
}
|
||||
Timer::after(Duration::from_millis(1000)).await;
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user