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Generate USART pin definitions for stm32f1

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This commit is contained in:
Tobias Pisani 2021-10-09 11:40:39 +02:00
parent 39880de958
commit 091e7e1f98
2 changed files with 45 additions and 7 deletions
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12
embassy-stm32/src/gpio.rs
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@ -401,15 +401,15 @@ pub(crate) mod sealed {
// F1 uses the AFIO register for remapping. // F1 uses the AFIO register for remapping.
// For now, this is not implemented, so af_num is ignored // For now, this is not implemented, so af_num is ignored
// _af_num should be zero here, since it is not set by stm32-data // _af_num should be zero here, since it is not set by stm32-data
let r = pin.block(); let r = self.block();
let n = pin.pin() as usize; let n = self._pin() as usize;
let crlh = if n < 8 { 0 } else { 1 }; let crlh = if n < 8 { 0 } else { 1 };
match af_type { match af_type {
// TODO: Do we need to configure input AF pins differently? // TODO: Do we need to configure input AF pins differently?
AfType::OutputPushPull => { AFType::OutputPushPull => {
r.cr(crlh).modify(|w| w.set_cnf(n % 8, vals::Cnf::PUSHPULL)); r.cr(crlh).modify(|w| w.set_cnf(n % 8, vals::Cnf::PUSHPULL));
} }
AfType::OutputOpenDrain => r AFType::OutputOpenDrain => r
.cr(crlh) .cr(crlh)
.modify(|w| w.set_cnf(n % 8, vals::Cnf::OPENDRAIN)), .modify(|w| w.set_cnf(n % 8, vals::Cnf::OPENDRAIN)),
} }
@ -422,10 +422,10 @@ pub(crate) mod sealed {
.afr(pin / 8) .afr(pin / 8)
.modify(|w| w.set_afr(pin % 8, vals::Afr(af_num))); .modify(|w| w.set_afr(pin % 8, vals::Afr(af_num)));
match af_type { match af_type {
AfType::OutputPushPull => { AFType::OutputPushPull => {
block.otyper().modify(|w| w.set_ot(pin, vals::Ot::PUSHPULL)) block.otyper().modify(|w| w.set_ot(pin, vals::Ot::PUSHPULL))
} }
AfType::OutputOpenDrain => block AFType::OutputOpenDrain => block
.otyper() .otyper()
.modify(|w| w.set_ot(pin, vals::Ot::OPENDRAIN)), .modify(|w| w.set_ot(pin, vals::Ot::OPENDRAIN)),
} }

40
embassy-stm32/src/usart/mod.rs
View File

@ -127,7 +127,6 @@ crate::pac::interrupts!(
}; };
); );
#[cfg(not(rcc_f1))]
macro_rules! impl_pin { macro_rules! impl_pin {
($inst:ident, $pin:ident, $signal:ident, $af:expr) => { ($inst:ident, $pin:ident, $signal:ident, $af:expr) => {
impl sealed::$signal<peripherals::$inst> for peripherals::$pin { impl sealed::$signal<peripherals::$inst> for peripherals::$pin {
@ -140,6 +139,7 @@ macro_rules! impl_pin {
}; };
} }
#[cfg(not(rcc_f1))]
crate::pac::peripheral_pins!( crate::pac::peripheral_pins!(
// USART // USART
@ -177,6 +177,44 @@ crate::pac::peripheral_pins!(
}; };
); );
#[cfg(rcc_f1)]
crate::pac::peripheral_pins!(
// USART
($inst:ident, usart, USART, $pin:ident, TX) => {
impl_pin!($inst, $pin, TxPin, 0);
};
($inst:ident, usart, USART, $pin:ident, RX) => {
impl_pin!($inst, $pin, RxPin, 0);
};
($inst:ident, usart, USART, $pin:ident, CTS) => {
impl_pin!($inst, $pin, CtsPin, 0);
};
($inst:ident, usart, USART, $pin:ident, RTS) => {
impl_pin!($inst, $pin, RtsPin, 0);
};
($inst:ident, usart, USART, $pin:ident, CK) => {
impl_pin!($inst, $pin, CkPin, 0);
};
// UART
($inst:ident, uart, UART, $pin:ident, TX) => {
impl_pin!($inst, $pin, TxPin, 0);
};
($inst:ident, uart, UART, $pin:ident, RX) => {
impl_pin!($inst, $pin, RxPin, 0);
};
($inst:ident, uart, UART, $pin:ident, CTS) => {
impl_pin!($inst, $pin, CtsPin, 0);
};
($inst:ident, uart, UART, $pin:ident, RTS) => {
impl_pin!($inst, $pin, RtsPin, 0);
};
($inst:ident, uart, UART, $pin:ident, CK) => {
impl_pin!($inst, $pin, CkPin, 0);
};
);
macro_rules! impl_dma { macro_rules! impl_dma {
($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => { ($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => {
impl<T> sealed::$signal<peripherals::$inst> for T impl<T> sealed::$signal<peripherals::$inst> for T