STM32: Remove vestigal build.rs cfgs, add new flashsize_X and package_X cfgs, use in F3 RCC
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					committed by
					
						
						Dario Nieuwenhuis
					
				
			
			
				
	
			
			
			
						parent
						
							f5c9e3baa6
						
					
				
				
					commit
					2218d30c80
				
			@@ -65,7 +65,6 @@ fn main() {
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            match r.kind {
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                // Generate singletons per pin, not per port
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                "gpio" => {
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                    println!("{}", p.name);
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                    let port_letter = p.name.strip_prefix("GPIO").unwrap();
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                    for pin_num in 0..16 {
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                        singletons.push(format!("P{}{}", port_letter, pin_num));
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@@ -1352,15 +1351,6 @@ fn main() {
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    if let Some(core) = core_name {
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        println!("cargo:rustc-cfg={}_{}", &chip_name[..chip_name.len() - 2], core);
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    } else {
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        println!("cargo:rustc-cfg={}", &chip_name[..chip_name.len() - 2]);
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    }
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    // ========
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    // stm32f3 wildcard features used in RCC
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    if chip_name.starts_with("stm32f3") {
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        println!("cargo:rustc-cfg={}x{}", &chip_name[..9], &chip_name[10..11]);
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    }
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    // =======
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@@ -1375,17 +1365,17 @@ fn main() {
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    if &chip_name[..8] == "stm32wba" {
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        println!("cargo:rustc-cfg={}", &chip_name[..8]); // stm32wba
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        println!("cargo:rustc-cfg={}", &chip_name[..10]); // stm32wba52
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        println!("cargo:rustc-cfg=package_{}", &chip_name[10..11]);
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        println!("cargo:rustc-cfg=flashsize_{}", &chip_name[11..12]);
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    } else {
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        println!("cargo:rustc-cfg={}", &chip_name[..7]); // stm32f4
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        println!("cargo:rustc-cfg={}", &chip_name[..9]); // stm32f429
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        println!("cargo:rustc-cfg={}x", &chip_name[..8]); // stm32f42x
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        println!("cargo:rustc-cfg={}x{}", &chip_name[..7], &chip_name[8..9]); // stm32f4x9
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        println!("cargo:rustc-cfg=package_{}", &chip_name[9..10]);
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        println!("cargo:rustc-cfg=flashsize_{}", &chip_name[10..11]);
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    }
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    // Handle time-driver-XXXX features.
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    if env::var("CARGO_FEATURE_TIME_DRIVER_ANY").is_ok() {}
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    println!("cargo:rustc-cfg={}", &chip_name[..chip_name.len() - 2]);
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    println!("cargo:rerun-if-changed=build.rs");
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}
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@@ -346,10 +346,7 @@ fn calc_pll(config: &Config, Hertz(sysclk): Hertz) -> (Hertz, PllConfig) {
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        None => {
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            cfg_if::cfg_if! {
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                // For some chips PREDIV is always two, and cannot be changed
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                if #[cfg(any(
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                        stm32f302xd, stm32f302xe, stm32f303xd,
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                        stm32f303xe, stm32f398xe
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                    ))] {
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                if #[cfg(any(flashsize_d, flashsize_e))] {
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                    let (multiplier, divisor) = get_mul_div(sysclk, HSI_FREQ.0);
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                    (
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                        Hertz((HSI_FREQ.0 / divisor) * multiplier),
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