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Undoing unnecessary changes

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This commit is contained in:
Dion Dokter 2021-10-12 11:43:57 +02:00
parent 995cd01cbc
commit 2c2c284482
14 changed files with 90 additions and 151 deletions
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5
embassy-nrf/src/buffered_uarte.rs
View File

@ -14,13 +14,14 @@ use embassy_hal_common::{low_power_wait_until, unborrow};
use crate::gpio::sealed::Pin as _;
use crate::gpio::{OptionalPin as GpioOptionalPin, Pin as GpioPin};
use crate::pac;
use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
use crate::timer::Instance as TimerInstance;
use crate::timer::{Frequency, Timer};
use crate::uarte::{uarte0, Config, Instance as UarteInstance};
use crate::uarte::{Config, Instance as UarteInstance};
// Re-export SVD variants to allow user to directly set values
pub use uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
#[derive(Copy, Clone, Debug, PartialEq)]
enum RxState {

75
embassy-nrf/src/chips/nrf9160.rs
View File

@ -1,7 +1,32 @@
pub use nrf9160_pac as pac;
#[allow(unused_imports)]
pub mod pac {
// The nRF9160 has a secure and non-secure (NS) mode.
// For now we only support the NS mode, but those peripherals have `_ns` appended to them.
// To avoid cfg spam, weŕe going to rename the ones we use here.
#[rustfmt::skip]
pub(crate) use nrf9160_pac::{
p0_ns as p0,
pwm0_ns as pwm0,
rtc0_ns as rtc0,
spim0_ns as spim0,
timer0_ns as timer0,
twim0_ns as twim0,
uarte0_ns as uarte0,
DPPIC_NS as PPI,
GPIOTE1_NS as GPIOTE,
P0_NS as P0,
RTC1_NS as RTC1,
WDT_NS as WDT,
saadc_ns as saadc,
SAADC_NS as SAADC,
CLOCK_NS as CLOCK,
};
pub use nrf9160_pac::*;
}
/// The maximum buffer size that the EasyDMA can send/recv in one operation.
pub const EASY_DMA_SIZE: usize = (1 << 12) - 1;
pub const EASY_DMA_SIZE: usize = (1 << 13) - 1;
pub const FORCE_COPY_BUFFER_SIZE: usize = 1024;
embassy_hal_common::peripherals! {
@ -12,23 +37,11 @@ embassy_hal_common::peripherals! {
// WDT
WDT,
// UARTE
UARTE0,
UARTE1,
UARTE2,
UARTE3,
// TWI
TWI0,
TWI1,
TWI2,
TWI3,
// SPI
SPI0,
SPI1,
SPI2,
SPI3,
// UARTE, TWI & SPI
UARTETWISPI0,
UARTETWISPI1,
UARTETWISPI2,
UARTETWISPI3,
// SAADC
SAADC,
@ -114,20 +127,20 @@ embassy_hal_common::peripherals! {
P0_31,
}
impl_uarte!(UARTE0, UARTE0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_uarte!(UARTE1, UARTE1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_uarte!(UARTE2, UARTE2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_uarte!(UARTE3, UARTE3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_uarte!(UARTETWISPI0, UARTE0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_uarte!(UARTETWISPI1, UARTE1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_uarte!(UARTETWISPI2, UARTE2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_uarte!(UARTETWISPI3, UARTE3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_spim!(SPI0, SPIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_spim!(SPI1, SPIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_spim!(SPI2, SPIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_spim!(SPI3, SPIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_spim!(UARTETWISPI0, SPIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_spim!(UARTETWISPI1, SPIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_spim!(UARTETWISPI2, SPIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_spim!(UARTETWISPI3, SPIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_twim!(TWI0, TWIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_twim!(TWI1, TWIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_twim!(TWI2, TWIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_twim!(TWI3, TWIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_twim!(UARTETWISPI0, TWIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
impl_twim!(UARTETWISPI1, TWIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
impl_twim!(UARTETWISPI2, TWIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
impl_twim!(UARTETWISPI3, TWIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
impl_pwm!(PWM0, PWM0_NS, PWM0);
impl_pwm!(PWM1, PWM1_NS, PWM1);

9
embassy-nrf/src/gpio.rs
View File

@ -10,18 +10,14 @@ use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin};
use gpio::pin_cnf::DRIVE_A;
use crate::pac;
#[cfg(not(feature = "nrf9160"))]
use crate::pac::p0 as gpio;
#[cfg(feature = "nrf9160")]
use crate::pac::p0_ns as gpio;
use self::sealed::Pin as _;
/// A GPIO port with up to 32 pins.
#[derive(Debug, Eq, PartialEq)]
pub enum Port {
/// Port 0, available on all nRF52 and nRF51 MCUs.
/// Port 0, available on nRF9160 and all nRF52 and nRF51 MCUs.
Port0,
/// Port 1, only available on some nRF52 MCUs.
@ -303,10 +299,7 @@ pub(crate) mod sealed {
fn block(&self) -> &gpio::RegisterBlock {
unsafe {
match self.pin_port() / 32 {
#[cfg(not(feature = "nrf9160"))]
0 => &*pac::P0::ptr(),
#[cfg(feature = "nrf9160")]
0 => &*pac::P0_NS::ptr(),
#[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
1 => &*pac::P1::ptr(),
_ => unreachable_unchecked(),

48
embassy-nrf/src/gpiote.rs
View File

@ -22,18 +22,6 @@ pub const PIN_COUNT: usize = 48;
#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
pub const PIN_COUNT: usize = 32;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::P0;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::P0_NS as P0;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::P1;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::GPIOTE;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::GPIOTE1_NS as GPIOTE;
const NEW_AW: AtomicWaker = AtomicWaker::new();
static CHANNEL_WAKERS: [AtomicWaker; CHANNEL_COUNT] = [NEW_AW; CHANNEL_COUNT];
static PORT_WAKERS: [AtomicWaker; PIN_COUNT] = [NEW_AW; PIN_COUNT];
@ -54,9 +42,9 @@ pub enum OutputChannelPolarity {
pub(crate) fn init(irq_prio: crate::interrupt::Priority) {
#[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
let ports = unsafe { &[&*P0::ptr(), &*P1::ptr()] };
let ports = unsafe { &[&*pac::P0::ptr(), &*pac::P1::ptr()] };
#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
let ports = unsafe { &[&*P0::ptr()] };
let ports = unsafe { &[&*pac::P0::ptr()] };
for &p in ports {
// Enable latched detection
@ -76,7 +64,7 @@ pub(crate) fn init(irq_prio: crate::interrupt::Priority) {
irq.set_priority(irq_prio);
irq.enable();
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
g.events_port.write(|w| w);
g.intenset.write(|w| w.port().set());
}
@ -94,7 +82,7 @@ fn GPIOTE1() {
}
unsafe fn handle_gpiote_interrupt() {
let g = &*GPIOTE::ptr();
let g = &*pac::GPIOTE::ptr();
for i in 0..CHANNEL_COUNT {
if g.events_in[i].read().bits() != 0 {
@ -107,9 +95,9 @@ unsafe fn handle_gpiote_interrupt() {
g.events_port.write(|w| w);
#[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
let ports = &[&*P0::ptr(), &*P1::ptr()];
let ports = &[&*pac::P0::ptr(), &*pac::P1::ptr()];
#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
let ports = &[&*P0::ptr()];
let ports = &[&*pac::P0::ptr()];
for (port, &p) in ports.iter().enumerate() {
let bits = p.latch.read().bits();
@ -146,7 +134,7 @@ pub struct InputChannel<'d, C: Channel, T: GpioPin> {
impl<'d, C: Channel, T: GpioPin> Drop for InputChannel<'d, C, T> {
fn drop(&mut self) {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
let num = self.ch.number();
g.config[num].write(|w| w.mode().disabled());
g.intenclr.write(|w| unsafe { w.bits(1 << num) });
@ -155,7 +143,7 @@ impl<'d, C: Channel, T: GpioPin> Drop for InputChannel<'d, C, T> {
impl<'d, C: Channel, T: GpioPin> InputChannel<'d, C, T> {
pub fn new(ch: C, pin: Input<'d, T>, polarity: InputChannelPolarity) -> Self {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
let num = ch.number();
g.config[num].write(|w| {
@ -179,7 +167,7 @@ impl<'d, C: Channel, T: GpioPin> InputChannel<'d, C, T> {
}
pub async fn wait(&self) {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
let num = self.ch.number();
// Enable interrupt
@ -200,7 +188,7 @@ impl<'d, C: Channel, T: GpioPin> InputChannel<'d, C, T> {
/// Returns the IN event, for use with PPI.
pub fn event_in(&self) -> Event {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
Event::from_reg(&g.events_in[self.ch.number()])
}
}
@ -225,7 +213,7 @@ pub struct OutputChannel<'d, C: Channel, T: GpioPin> {
impl<'d, C: Channel, T: GpioPin> Drop for OutputChannel<'d, C, T> {
fn drop(&mut self) {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
let num = self.ch.number();
g.config[num].write(|w| w.mode().disabled());
g.intenclr.write(|w| unsafe { w.bits(1 << num) });
@ -234,7 +222,7 @@ impl<'d, C: Channel, T: GpioPin> Drop for OutputChannel<'d, C, T> {
impl<'d, C: Channel, T: GpioPin> OutputChannel<'d, C, T> {
pub fn new(ch: C, pin: Output<'d, T>, polarity: OutputChannelPolarity) -> Self {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
let num = ch.number();
g.config[num].write(|w| {
@ -261,41 +249,41 @@ impl<'d, C: Channel, T: GpioPin> OutputChannel<'d, C, T> {
/// Triggers `task out` (as configured with task_out_polarity, defaults to Toggle).
pub fn out(&self) {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
g.tasks_out[self.ch.number()].write(|w| unsafe { w.bits(1) });
}
/// Triggers `task set` (set associated pin high).
#[cfg(not(feature = "nrf51"))]
pub fn set(&self) {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
g.tasks_set[self.ch.number()].write(|w| unsafe { w.bits(1) });
}
/// Triggers `task clear` (set associated pin low).
#[cfg(not(feature = "nrf51"))]
pub fn clear(&self) {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
g.tasks_clr[self.ch.number()].write(|w| unsafe { w.bits(1) });
}
/// Returns the OUT task, for use with PPI.
pub fn task_out(&self) -> Task {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
Task::from_reg(&g.tasks_out[self.ch.number()])
}
/// Returns the CLR task, for use with PPI.
#[cfg(not(feature = "nrf51"))]
pub fn task_clr(&self) -> Task {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
Task::from_reg(&g.tasks_clr[self.ch.number()])
}
/// Returns the SET task, for use with PPI.
#[cfg(not(feature = "nrf51"))]
pub fn task_set(&self) -> Task {
let g = unsafe { &*GPIOTE::ptr() };
let g = unsafe { &*pac::GPIOTE::ptr() };
Task::from_reg(&g.tasks_set[self.ch.number()])
}
}

6
embassy-nrf/src/lib.rs
View File

@ -77,12 +77,8 @@ pub use chip::pac;
#[cfg(not(feature = "unstable-pac"))]
pub(crate) use chip::pac;
pub use chip::{peripherals, Peripherals};
#[cfg(not(feature = "nrf9160"))]
use crate::pac::CLOCK;
#[cfg(feature = "nrf9160")]
use crate::pac::CLOCK_NS as CLOCK;
pub use chip::{peripherals, Peripherals};
pub mod interrupt {
pub use crate::chip::irqs::*;

20
embassy-nrf/src/ppi.rs
View File

@ -11,18 +11,12 @@
//! On nRF52 devices, there is also a fork task endpoint, where the user can configure one more task
//! to be triggered by the same event, even fixed PPI channels have a configurable fork task.
use crate::{pac, peripherals};
use core::marker::PhantomData;
use core::ptr::NonNull;
use embassy::util::Unborrow;
use embassy_hal_common::{unborrow, unsafe_impl_unborrow};
use crate::{pac, peripherals};
#[cfg(feature = "nrf9160")]
pub(crate) use pac::DPPIC_NS as PPI;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::PPI;
// ======================
// driver
@ -47,14 +41,14 @@ impl<'d, C: Channel> Ppi<'d, C> {
/// Enables the channel.
pub fn enable(&mut self) {
let r = unsafe { &*PPI::ptr() };
let r = unsafe { &*pac::PPI::ptr() };
r.chenset
.write(|w| unsafe { w.bits(1 << self.ch.number()) });
}
/// Disables the channel.
pub fn disable(&mut self) {
let r = unsafe { &*PPI::ptr() };
let r = unsafe { &*pac::PPI::ptr() };
r.chenclr
.write(|w| unsafe { w.bits(1 << self.ch.number()) });
}
@ -63,7 +57,7 @@ impl<'d, C: Channel> Ppi<'d, C> {
/// Sets the fork task that must be triggered when the configured event occurs. The user must
/// provide a reference to the task.
pub fn set_fork_task(&mut self, task: Task) {
let r = unsafe { &*PPI::ptr() };
let r = unsafe { &*pac::PPI::ptr() };
r.fork[self.ch.number()]
.tep
.write(|w| unsafe { w.bits(task.0.as_ptr() as u32) })
@ -72,7 +66,7 @@ impl<'d, C: Channel> Ppi<'d, C> {
#[cfg(not(any(feature = "nrf51", feature = "nrf9160")))]
/// Clear the fork task endpoint. Previously set task will no longer be triggered.
pub fn clear_fork_task(&mut self) {
let r = unsafe { &*PPI::ptr() };
let r = unsafe { &*pac::PPI::ptr() };
r.fork[self.ch.number()].tep.write(|w| unsafe { w.bits(0) })
}
@ -100,7 +94,7 @@ impl<'d, C: Channel> Drop for Ppi<'d, C> {
impl<'d, C: ConfigurableChannel> Ppi<'d, C> {
/// Sets the task to be triggered when the configured event occurs.
pub fn set_task(&mut self, task: Task) {
let r = unsafe { &*PPI::ptr() };
let r = unsafe { &*pac::PPI::ptr() };
r.ch[self.ch.number()]
.tep
.write(|w| unsafe { w.bits(task.0.as_ptr() as u32) })
@ -108,7 +102,7 @@ impl<'d, C: ConfigurableChannel> Ppi<'d, C> {
/// Sets the event that will trigger the chosen task(s).
pub fn set_event(&mut self, event: Event) {
let r = unsafe { &*PPI::ptr() };
let r = unsafe { &*pac::PPI::ptr() };
r.ch[self.ch.number()]
.eep
.write(|w| unsafe { w.bits(event.0.as_ptr() as u32) })

9
embassy-nrf/src/pwm.rs
View File

@ -11,11 +11,6 @@ use crate::gpio::OptionalPin as GpioOptionalPin;
use crate::interrupt::Interrupt;
use crate::pac;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::pwm0;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::pwm0_ns as pwm0;
#[derive(Debug, Eq, PartialEq, Clone, Copy)]
pub enum Prescaler {
Div1,
@ -208,7 +203,7 @@ pub(crate) mod sealed {
}
pub trait Instance {
fn regs() -> &'static pwm0::RegisterBlock;
fn regs() -> &'static pac::pwm0::RegisterBlock;
fn state() -> &'static State;
}
}
@ -220,7 +215,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
macro_rules! impl_pwm {
($type:ident, $pac_type:ident, $irq:ident) => {
impl crate::pwm::sealed::Instance for peripherals::$type {
fn regs() -> &'static crate::pwm::pwm0::RegisterBlock {
fn regs() -> &'static pac::pwm0::RegisterBlock {
unsafe { &*pac::$pac_type::ptr() }
}
fn state() -> &'static crate::pwm::sealed::State {

3
embassy-nrf/src/saadc.rs
View File

@ -12,10 +12,7 @@ use futures::future::poll_fn;
use crate::interrupt;
use crate::{pac, peripherals};
#[cfg(not(feature = "nrf9160"))]
use pac::{saadc, SAADC};
#[cfg(feature = "nrf9160")]
use pac::{saadc_ns as saadc, SAADC_NS as SAADC};
pub use saadc::{
ch::{

11
embassy-nrf/src/spim.rs
View File

@ -17,13 +17,8 @@ use crate::gpio::{OptionalPin, Pin as GpioPin};
use crate::interrupt::Interrupt;
use crate::{pac, util::slice_in_ram_or};
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::spim0;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::spim0_ns as spim0;
pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
pub use spim0::frequency::FREQUENCY_A as Frequency;
pub use pac::spim0::frequency::FREQUENCY_A as Frequency;
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
@ -381,7 +376,7 @@ pub(crate) mod sealed {
}
pub trait Instance {
fn regs() -> &'static spim0::RegisterBlock;
fn regs() -> &'static pac::spim0::RegisterBlock;
fn state() -> &'static State;
}
}
@ -393,7 +388,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
macro_rules! impl_spim {
($type:ident, $pac_type:ident, $irq:ident) => {
impl crate::spim::sealed::Instance for peripherals::$type {
fn regs() -> &'static crate::spim::spim0::RegisterBlock {
fn regs() -> &'static pac::spim0::RegisterBlock {
unsafe { &*pac::$pac_type::ptr() }
}
fn state() -> &'static crate::spim::sealed::State {

16
embassy-nrf/src/time_driver.rs
View File

@ -9,20 +9,8 @@ use embassy::time::driver::{AlarmHandle, Driver};
use crate::interrupt;
use crate::pac;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::rtc0;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::rtc0_ns as rtc0;
fn rtc() -> &'static rtc0::RegisterBlock {
#[cfg(not(feature = "nrf9160"))]
unsafe {
&*pac::RTC1::ptr()
}
#[cfg(feature = "nrf9160")]
unsafe {
&*pac::RTC1_NS::ptr()
}
fn rtc() -> &'static pac::rtc0::RegisterBlock {
unsafe { &*pac::RTC1::ptr() }
}
// RTC timekeeping works with something we call "periods", which are time intervals

11
embassy-nrf/src/timer.rs
View File

@ -15,11 +15,6 @@ use crate::pac;
use crate::ppi::Event;
use crate::ppi::Task;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::timer0;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::timer0_ns as timer0;
pub(crate) mod sealed {
use super::*;
@ -27,7 +22,7 @@ pub(crate) mod sealed {
pub trait Instance {
/// The number of CC registers this instance has.
const CCS: usize;
fn regs() -> &'static timer0::RegisterBlock;
fn regs() -> &'static pac::timer0::RegisterBlock;
/// Storage for the waker for CC register `n`.
fn waker(n: usize) -> &'static AtomicWaker;
}
@ -45,8 +40,8 @@ macro_rules! impl_timer {
($type:ident, $pac_type:ident, $irq:ident, $ccs:literal) => {
impl crate::timer::sealed::Instance for peripherals::$type {
const CCS: usize = $ccs;
fn regs() -> &'static crate::timer::timer0::RegisterBlock {
unsafe { &*(pac::$pac_type::ptr() as *const crate::timer::timer0::RegisterBlock) }
fn regs() -> &'static pac::timer0::RegisterBlock {
unsafe { &*(pac::$pac_type::ptr() as *const pac::timer0::RegisterBlock) }
}
fn waker(n: usize) -> &'static ::embassy::waitqueue::AtomicWaker {
use ::embassy::waitqueue::AtomicWaker;

9
embassy-nrf/src/twim.rs
View File

@ -24,11 +24,6 @@ use crate::gpio::Pin as GpioPin;
use crate::pac;
use crate::util::{slice_in_ram, slice_in_ram_or};
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::twim0;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::twim0_ns as twim0;
pub enum Frequency {
#[doc = "26738688: 100 kbps"]
K100 = 26738688,
@ -726,7 +721,7 @@ pub(crate) mod sealed {
}
pub trait Instance {
fn regs() -> &'static twim0::RegisterBlock;
fn regs() -> &'static pac::twim0::RegisterBlock;
fn state() -> &'static State;
}
}
@ -738,7 +733,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
macro_rules! impl_twim {
($type:ident, $pac_type:ident, $irq:ident) => {
impl crate::twim::sealed::Instance for peripherals::$type {
fn regs() -> &'static crate::twim::twim0::RegisterBlock {
fn regs() -> &'static pac::twim0::RegisterBlock {
unsafe { &*pac::$pac_type::ptr() }
}
fn state() -> &'static crate::twim::sealed::State {

11
embassy-nrf/src/uarte.rs
View File

@ -22,13 +22,8 @@ use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
use crate::timer::Instance as TimerInstance;
use crate::timer::{Frequency, Timer};
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::uarte0;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::uarte0_ns as uarte0;
// Re-export SVD variants to allow user to directly set values.
pub use uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
#[non_exhaustive]
pub struct Config {
@ -463,7 +458,7 @@ pub(crate) mod sealed {
}
pub trait Instance {
fn regs() -> &'static uarte0::RegisterBlock;
fn regs() -> &'static pac::uarte0::RegisterBlock;
fn state() -> &'static State;
}
}
@ -475,7 +470,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static + Send
macro_rules! impl_uarte {
($type:ident, $pac_type:ident, $irq:ident) => {
impl crate::uarte::sealed::Instance for peripherals::$type {
fn regs() -> &'static crate::uarte::uarte0::RegisterBlock {
fn regs() -> &'static pac::uarte0::RegisterBlock {
unsafe { &*pac::$pac_type::ptr() }
}
fn state() -> &'static crate::uarte::sealed::State {

8
embassy-nrf/src/wdt.rs
View File

@ -3,13 +3,7 @@
//! This HAL implements a basic watchdog timer with 1..=8 handles.
//! Once the watchdog has been started, it cannot be stopped.
use crate::pac;
#[cfg(not(feature = "nrf9160"))]
pub(crate) use pac::WDT;
#[cfg(feature = "nrf9160")]
pub(crate) use pac::WDT_NS as WDT;
use crate::pac::WDT;
use crate::peripherals;
const MIN_TICKS: u32 = 15;