stm32/rcc: rename common to bus

This commit is contained in:
xoviat 2023-08-27 08:35:13 -05:00
parent 13f0501673
commit 48085939e7
16 changed files with 19 additions and 19 deletions

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@ -1,4 +1,4 @@
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::flash::vals::Latency;
use crate::pac::rcc::vals::{Hsidiv, Ppre, Sw};
use crate::pac::{FLASH, RCC};

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@ -1,7 +1,7 @@
use core::convert::TryFrom;
use core::ops::{Div, Mul};
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::flash::vals::Latency;
use crate::pac::rcc::vals::{Pllp, Pllsrc, Sw};
use crate::pac::{FLASH, RCC};
@ -201,7 +201,7 @@ pub struct PLLClocks {
pub pll48_freq: Hertz,
}
pub use super::common::VoltageScale;
pub use super::bus::VoltageScale;
impl VoltageScale {
const fn wait_states(&self, ahb_freq: Hertz) -> Option<Latency> {

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@ -201,9 +201,9 @@ fn calc_pll(config: &Config, Hertz(sysclk): Hertz) -> (Hertz, PllConfig) {
// Calculates the Multiplier and the Divisor to arrive at
// the required System clock from PLL source frequency
let get_mul_div = |sysclk, pllsrcclk| {
let common_div = gcd(sysclk, pllsrcclk);
let mut multiplier = sysclk / common_div;
let mut divisor = pllsrcclk / common_div;
let bus_div = gcd(sysclk, pllsrcclk);
let mut multiplier = sysclk / bus_div;
let mut divisor = pllsrcclk / bus_div;
// Minimum PLL multiplier is two
if multiplier == 1 {
multiplier *= 2;

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@ -1,4 +1,4 @@
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::flash::vals::Latency;
use crate::pac::rcc::vals::{self, Hsidiv, Ppre, Sw};
use crate::pac::{FLASH, PWR, RCC};

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@ -2,7 +2,7 @@ use stm32_metapac::flash::vals::Latency;
use stm32_metapac::rcc::vals::{Hpre, Pllsrc, Ppre, Sw};
use stm32_metapac::FLASH;
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::{PWR, RCC};
use crate::rcc::sealed::RccPeripheral;
use crate::rcc::{set_freqs, Clocks};

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@ -26,7 +26,7 @@ const VCO_MAX: u32 = 420_000_000;
const VCO_WIDE_MIN: u32 = 128_000_000;
const VCO_WIDE_MAX: u32 = 560_000_000;
pub use super::common::{AHBPrescaler, APBPrescaler, VoltageScale};
pub use super::bus::{AHBPrescaler, APBPrescaler, VoltageScale};
pub enum HseMode {
/// crystal/ceramic oscillator (HSEBYP=0)

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@ -24,7 +24,7 @@ pub const HSI48_FREQ: Hertz = Hertz(48_000_000);
/// LSI speed
pub const LSI_FREQ: Hertz = Hertz(32_000);
pub use super::common::VoltageScale;
pub use super::bus::VoltageScale;
#[derive(Clone, Copy)]
pub enum AdcClockSource {

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@ -1,4 +1,4 @@
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw};
use crate::pac::RCC;
#[cfg(crs)]

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@ -1,4 +1,4 @@
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw};
use crate::pac::{FLASH, RCC};
use crate::rcc::{set_freqs, Clocks};

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@ -4,7 +4,7 @@ use embassy_hal_internal::into_ref;
use stm32_metapac::rcc::regs::Cfgr;
use stm32_metapac::rcc::vals::{Lsedrv, Mcopre, Mcosel};
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::gpio::sealed::AFType;
use crate::gpio::Speed;
use crate::pac::rcc::vals::{Hpre, Msirange, Pllsrc, Ppre, Sw};

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@ -1,6 +1,6 @@
use stm32_metapac::PWR;
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::rcc::vals::{Hpre, Msirange, Pllsrc, Ppre, Sw};
use crate::pac::{FLASH, RCC};
use crate::rcc::{set_freqs, Clocks};

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@ -1,6 +1,6 @@
#![macro_use]
pub mod common;
pub mod bus;
use core::mem::MaybeUninit;

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@ -1,6 +1,6 @@
use stm32_metapac::rcc::vals::{Msirange, Msirgsel, Pllm, Pllsrc, Sw};
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::pac::{FLASH, RCC};
use crate::rcc::{set_freqs, Clocks};
use crate::time::Hertz;
@ -11,7 +11,7 @@ pub const HSI_FREQ: Hertz = Hertz(16_000_000);
/// LSI speed
pub const LSI_FREQ: Hertz = Hertz(32_000);
pub use super::common::VoltageScale;
pub use super::bus::VoltageScale;
#[derive(Copy, Clone)]
pub enum ClockSrc {

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@ -1,4 +1,4 @@
pub use super::common::{AHBPrescaler, APBPrescaler};
pub use super::bus::{AHBPrescaler, APBPrescaler};
use crate::rcc::Clocks;
use crate::rtc::{Rtc, RtcClockSource};
use crate::time::{khz, mhz, Hertz};

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@ -1,4 +1,4 @@
pub use super::common::{AHBPrescaler, APBPrescaler, VoltageScale};
pub use super::bus::{AHBPrescaler, APBPrescaler, VoltageScale};
use crate::pac::pwr::vals::Dbp;
use crate::pac::{FLASH, PWR, RCC};
use crate::rcc::{set_freqs, Clocks};