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tests/stm32: centralize pin configuration.

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This commit is contained in:
Dario Nieuwenhuis
2023-09-25 22:34:18 +02:00
parent bd9021ca1d
commit 4b695120fc
7 changed files with 119 additions and 243 deletions
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24
tests/stm32/src/bin/spi_dma.rs
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@@ -15,24 +15,12 @@ async fn main(_spawner: Spawner) {
let p = embassy_stm32::init(config());
info!("Hello World!");
#[cfg(feature = "stm32f103c8")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2);
#[cfg(feature = "stm32f429zi")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2);
#[cfg(feature = "stm32h755zi")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1);
#[cfg(feature = "stm32g491re")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32g071rb")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32wb55rg")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32u585ai")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32h563zi")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32c031c6")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
let spi = peri!(p, SPI);
let sck = peri!(p, SPI_SCK);
let mosi = peri!(p, SPI_MOSI);
let miso = peri!(p, SPI_MISO);
let tx_dma = peri!(p, SPI_TX_DMA);
let rx_dma = peri!(p, SPI_RX_DMA);
let mut spi_config = spi::Config::default();
spi_config.frequency = Hertz(1_000_000);