Stub in the DMA bits that aren't yet there.
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bf3bc92525
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54ada5bae1
@ -1,9 +1,11 @@
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#![macro_use]
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#[cfg(dma)]
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#[cfg_attr(dma_v1, path = "v1.rs")]
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#[cfg_attr(dma_v2, path = "v2.rs")]
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mod _version;
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#[cfg(dma)]
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#[allow(unused)]
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pub use _version::*;
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@ -26,7 +26,7 @@ pub mod adc;
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pub mod clock;
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#[cfg(dac)]
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pub mod dac;
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#[cfg(dma)]
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#[cfg(any(dma, dmamux))]
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pub mod dma;
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#[cfg(all(eth, feature = "net"))]
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pub mod eth;
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@ -21,7 +21,8 @@ impl<'d, T: Instance> Uart<'d, T> {
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) -> Self {
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unborrow!(inner, rx, tx);
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T::enable();
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// Uncomment once we find all of the H7's UART clocks.
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//T::enable();
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let pclk_freq = T::frequency();
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// TODO: better calculation, including error checking and OVER8 if possible.
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@ -58,7 +58,10 @@ fn main() -> ! {
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w.dbg_stop().set_bit()
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});
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pp.RCC.ahb1enr.modify(|_, w| w.dma1en().set_bit());
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pp.RCC.ahb1enr.modify(|_, w| {
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w.dma1en().set_bit();
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w
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});
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pp.RCC.ahb2enr.modify(|_, w| {
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w.gpioaen().set_bit();
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@ -70,6 +73,11 @@ fn main() -> ! {
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w
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});
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pp.RCC.apb1enr1.modify(|_, w| {
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w.uart4en().set_bit();
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w
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});
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pp.RCC.apb2enr.modify(|_, w| {
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w.syscfgen().set_bit();
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w
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