stm32/rcc: add better support for L4/L4+ differences.

2023-10-16 03:09:33 +02:00
parent f54753beaa
commit 5c5e681819
10 changed files with 206 additions and 155 deletions
--- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
+++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs
@ -79,8 +79,8 @@ async fn main(spawner: Spawner) {
    // 80MHz highest frequency for flash 0 wait.
    config.rcc.mux = ClockSrc::PLL;
    config.rcc.hse = Some(Hertz::mhz(8));
-    config.rcc.pll_src = PLLSource::HSE;
    config.rcc.pll = Some(Pll {
+        source: PLLSource::HSE,
        prediv: PllPreDiv::DIV1,
        mul: PllMul::MUL20,
        divp: None,