stm32/rcc: add better support for L4/L4+ differences.
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@ -26,8 +26,8 @@ async fn main(_spawner: Spawner) {
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config.rcc.hsi48 = true;
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config.rcc.mux = ClockSrc::PLL;
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config.rcc.hsi16 = true;
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config.rcc.pll_src = PLLSource::HSI16;
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config.rcc.pll = Some(Pll {
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source: PLLSource::HSI16,
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prediv: PllPreDiv::DIV1,
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mul: PllMul::MUL10,
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divp: None,
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