Merge pull request #1730 from bartekkowalski/main
LSE requires setting PWREN bit on STM32L4
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5e4f65fe1f
@ -412,6 +412,7 @@ pub(crate) unsafe fn init(config: Config) {
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match config.rtc_mux {
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match config.rtc_mux {
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RtcClockSource::LSE32 => {
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RtcClockSource::LSE32 => {
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// 1. Unlock the backup domain
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// 1. Unlock the backup domain
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RCC.apb1enr1().modify(|w| w.set_pwren(true));
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PWR.cr1().modify(|w| w.set_dbp(true));
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PWR.cr1().modify(|w| w.set_dbp(true));
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// 2. Setup the LSE
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// 2. Setup the LSE
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