stm32/wpan: get --release working
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38891c29ea
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6c13f381c4
@ -18,7 +18,7 @@ impl Ble {
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unsafe {
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LinkedListNode::init_head(EVT_QUEUE.as_mut_ptr());
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TL_BLE_TABLE = MaybeUninit::new(BleTable {
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TL_BLE_TABLE.as_mut_ptr().write_volatile(BleTable {
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pcmd_buffer: BLE_CMD_BUFFER.as_mut_ptr().cast(),
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pcs_buffer: CS_BUFFER.as_ptr().cast(),
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pevt_queue: EVT_QUEUE.as_ptr().cast(),
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@ -41,6 +41,8 @@ impl Ble {
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let event = EvtBox::new(event);
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EVT_CHANNEL.try_send(event).unwrap();
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break;
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}
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}
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@ -4,6 +4,7 @@
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pub mod fmt;
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use core::mem::MaybeUninit;
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use core::sync::atomic::{compiler_fence, Ordering};
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use cmd::CmdPacket;
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use embassy_futures::block_on;
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@ -189,33 +190,76 @@ impl<'d> TlMbox<'d> {
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into_ref!(ipcc);
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unsafe {
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TL_REF_TABLE = MaybeUninit::new(RefTable {
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device_info_table: TL_DEVICE_INFO_TABLE.as_mut_ptr(),
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TL_REF_TABLE.as_mut_ptr().write_volatile(RefTable {
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device_info_table: TL_DEVICE_INFO_TABLE.as_ptr(),
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ble_table: TL_BLE_TABLE.as_ptr(),
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thread_table: TL_THREAD_TABLE.as_ptr(),
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sys_table: TL_SYS_TABLE.as_ptr(),
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mem_manager_table: TL_MEM_MANAGER_TABLE.as_ptr(),
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traces_table: TL_TRACES_TABLE.as_ptr(),
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mac_802_15_4_table: TL_MAC_802_15_4_TABLE.as_ptr(),
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// zigbee_table: TL_ZIGBEE_TABLE.as_ptr(),
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// lld_tests_table: TL_LLD_TESTS_TABLE.as_ptr(),
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// ble_lld_table: TL_BLE_LLD_TABLE.as_ptr(),
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});
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TL_SYS_TABLE = MaybeUninit::zeroed();
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TL_DEVICE_INFO_TABLE = MaybeUninit::zeroed();
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TL_BLE_TABLE = MaybeUninit::zeroed();
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TL_THREAD_TABLE = MaybeUninit::zeroed();
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TL_MEM_MANAGER_TABLE = MaybeUninit::zeroed();
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TL_TRACES_TABLE = MaybeUninit::zeroed();
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TL_MAC_802_15_4_TABLE = MaybeUninit::zeroed();
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TL_SYS_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_DEVICE_INFO_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_BLE_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_THREAD_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_MEM_MANAGER_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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EVT_POOL = MaybeUninit::zeroed();
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SYS_SPARE_EVT_BUF = MaybeUninit::zeroed();
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BLE_SPARE_EVT_BUF = MaybeUninit::zeroed();
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TL_TRACES_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_MAC_802_15_4_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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// TL_ZIGBEE_TABLE
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// .as_mut_ptr()
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// .write_volatile(MaybeUninit::zeroed().assume_init());
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// TL_LLD_TESTS_TABLE
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// .as_mut_ptr()
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// .write_volatile(MaybeUninit::zeroed().assume_init());
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// TL_BLE_LLD_TABLE
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// .as_mut_ptr()
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// .write_volatile(MaybeUninit::zeroed().assume_init());
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CS_BUFFER = MaybeUninit::zeroed();
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BLE_CMD_BUFFER = MaybeUninit::zeroed();
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HCI_ACL_DATA_BUFFER = MaybeUninit::zeroed();
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EVT_POOL
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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SYS_SPARE_EVT_BUF
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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BLE_SPARE_EVT_BUF
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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{
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BLE_CMD_BUFFER
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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HCI_ACL_DATA_BUFFER
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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CS_BUFFER
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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}
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}
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compiler_fence(Ordering::SeqCst);
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Ipcc::enable(config);
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sys::Sys::enable();
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@ -20,7 +20,7 @@ impl MemoryManager {
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LinkedListNode::init_head(FREE_BUF_QUEUE.as_mut_ptr());
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LinkedListNode::init_head(LOCAL_FREE_BUF_QUEUE.as_mut_ptr());
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TL_MEM_MANAGER_TABLE = MaybeUninit::new(MemManagerTable {
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TL_MEM_MANAGER_TABLE.as_mut_ptr().write_volatile(MemManagerTable {
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spare_ble_buffer: BLE_SPARE_EVT_BUF.as_ptr().cast(),
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spare_sys_buffer: SYS_SPARE_EVT_BUF.as_ptr().cast(),
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blepool: EVT_POOL.as_ptr().cast(),
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@ -15,7 +15,7 @@ impl Sys {
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unsafe {
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LinkedListNode::init_head(SYSTEM_EVT_QUEUE.as_mut_ptr());
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TL_SYS_TABLE = MaybeUninit::new(SysTable {
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TL_SYS_TABLE.as_mut_ptr().write_volatile(SysTable {
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pcmd_buffer: SYS_CMD_BUF.as_mut_ptr(),
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sys_queue: SYSTEM_EVT_QUEUE.as_ptr(),
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})
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@ -51,12 +51,14 @@ impl Sys {
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let node_ptr_ptr: *mut _ = &mut node_ptr;
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while !LinkedListNode::is_empty(SYSTEM_EVT_QUEUE.as_mut_ptr()) {
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LinkedListNode::remove_head(SYSTEM_EVT_QUEUE.as_mut_ptr(), node_ptr_ptr);
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LinkedListNode::get_next_node(SYSTEM_EVT_QUEUE.as_mut_ptr(), node_ptr_ptr);
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let event = node_ptr.cast();
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let event = EvtBox::new(event);
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EVT_CHANNEL.try_send(event).unwrap();
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break;
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}
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}
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@ -11,6 +11,8 @@
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unused_mut
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)]
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use core::ptr;
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use cortex_m::interrupt;
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#[derive(Copy, Clone)]
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@ -30,54 +32,102 @@ impl Default for LinkedListNode {
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}
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impl LinkedListNode {
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pub unsafe fn init_head(mut list_head: *mut LinkedListNode) {
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(*list_head).next = list_head;
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(*list_head).prev = list_head;
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pub unsafe fn init_head(mut p_list_head: *mut LinkedListNode) {
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ptr::write_volatile(
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p_list_head,
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LinkedListNode {
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next: p_list_head,
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prev: p_list_head,
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},
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);
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}
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pub unsafe fn is_empty(mut list_head: *mut LinkedListNode) -> bool {
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interrupt::free(|_| ((*list_head).next) == list_head)
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pub unsafe fn is_empty(mut p_list_head: *mut LinkedListNode) -> bool {
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interrupt::free(|_| ptr::read_volatile(p_list_head).next == p_list_head)
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}
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pub unsafe fn insert_head(mut list_head: *mut LinkedListNode, mut node: *mut LinkedListNode) {
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/// Insert `node` after `list_head` and before the next node
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pub unsafe fn insert_head(mut p_list_head: *mut LinkedListNode, mut p_node: *mut LinkedListNode) {
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interrupt::free(|_| {
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(*node).next = (*list_head).next;
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(*node).prev = list_head;
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(*list_head).next = node;
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(*(*node).next).prev = node;
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let mut list_head = ptr::read_volatile(p_list_head);
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let mut node_next = ptr::read_volatile(list_head.next);
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let node = LinkedListNode {
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next: list_head.next,
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prev: p_list_head,
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};
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list_head.next = p_node;
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node_next.prev = p_node;
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// All nodes must be written because they will all be seen by another core
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ptr::write_volatile(p_node, node);
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ptr::write_volatile(node.next, node_next);
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ptr::write_volatile(p_list_head, list_head);
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});
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}
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pub unsafe fn insert_tail(mut list_head: *mut LinkedListNode, mut node: *mut LinkedListNode) {
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/// Insert `node` before `list_tail` and after the second-to-last node
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pub unsafe fn insert_tail(mut p_list_tail: *mut LinkedListNode, mut p_node: *mut LinkedListNode) {
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interrupt::free(|_| {
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(*node).next = list_head;
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(*node).prev = (*list_head).prev;
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(*list_head).prev = node;
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(*(*node).prev).next = node;
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let mut list_tail = ptr::read_volatile(p_list_tail);
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let mut node_prev = ptr::read_volatile(list_tail.prev);
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let node = LinkedListNode {
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next: p_list_tail,
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prev: list_tail.prev,
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};
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list_tail.prev = p_node;
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node_prev.next = p_node;
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// All nodes must be written because they will all be seen by another core
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ptr::write_volatile(p_node, node);
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ptr::write_volatile(node.prev, node_prev);
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ptr::write_volatile(p_list_tail, list_tail);
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});
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}
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/// Remove `node` from the linked list
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pub unsafe fn remove_node(mut node: *mut LinkedListNode) {
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// pub unsafe fn remove_node(mut node: *mut LinkedListNode) {
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// interrupt::free(|_| {
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// (*(*node).prev).next = (*node).next;
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// (*(*node).next).prev = (*node).prev;
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// });
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// }
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/// Remove `node` from the linked list
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pub unsafe fn remove_node(mut p_node: *mut LinkedListNode) {
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interrupt::free(|_| {
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(*(*node).prev).next = (*node).next;
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(*(*node).next).prev = (*node).prev;
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let node = ptr::read_volatile(p_node);
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let mut node_prev = ptr::read_volatile(node.prev);
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let mut node_next = ptr::read_volatile(node.next);
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node_prev.next = node.next;
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node_next.prev = node.prev;
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ptr::write_volatile(node.prev, node_prev);
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ptr::write_volatile(node.next, node_next);
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});
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}
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/// Remove `list_head` into `node`
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pub unsafe fn remove_head(mut list_head: *mut LinkedListNode, mut node: *mut *mut LinkedListNode) {
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pub unsafe fn remove_head(mut p_list_head: *mut LinkedListNode, mut p_node: *mut *mut LinkedListNode) {
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interrupt::free(|_| {
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*node = (*list_head).next;
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Self::remove_node((*list_head).next);
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let list_head = ptr::read_volatile(p_list_head);
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// Allowed because a removed node is not seen by another core
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*p_node = list_head.next;
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Self::remove_node(list_head.next);
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});
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}
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/// Remove `list_tail` into `node`
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pub unsafe fn remove_tail(mut list_tail: *mut LinkedListNode, mut node: *mut *mut LinkedListNode) {
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pub unsafe fn remove_tail(mut p_list_tail: *mut LinkedListNode, mut p_node: *mut *mut LinkedListNode) {
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interrupt::free(|_| {
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*node = (*list_tail).prev;
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Self::remove_node((*list_tail).prev);
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let list_tail = ptr::read_volatile(p_list_tail);
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// Allowed because a removed node is not seen by another core
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*p_node = list_tail.prev;
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Self::remove_node(list_tail.prev);
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});
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}
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@ -114,9 +164,12 @@ impl LinkedListNode {
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})
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}
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pub unsafe fn get_next_node(mut ref_node: *mut LinkedListNode, mut node: *mut *mut LinkedListNode) {
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pub unsafe fn get_next_node(mut p_ref_node: *mut LinkedListNode, mut p_node: *mut *mut LinkedListNode) {
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interrupt::free(|_| {
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*node = (*ref_node).next;
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let ref_node = ptr::read_volatile(p_ref_node);
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// Allowed because a removed node is not seen by another core
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*p_node = ref_node.next;
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});
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}
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@ -12,7 +12,7 @@ stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma"] # Nucleo
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stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"] # Nucleo
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stm32g491re = ["embassy-stm32/stm32g491re", "not-gpdma"] # Nucleo
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stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "not-gpdma"] # Nucleo
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stm32wb55rg = ["embassy-stm32/stm32wb55rg", "not-gpdma" ] # Nucleo
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stm32wb55rg = ["embassy-stm32/stm32wb55rg", "not-gpdma", "ble" ] # Nucleo
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stm32h563zi = ["embassy-stm32/stm32h563zi"] # Nucleo
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stm32u585ai = ["embassy-stm32/stm32u585ai"] # IoT board
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@ -11,6 +11,7 @@ use embassy_executor::Spawner;
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use embassy_stm32::bind_interrupts;
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use embassy_stm32::ipcc::Config;
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use embassy_stm32_wpan::TlMbox;
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use embassy_stm32_wpan::rc::RadioCoprocessor;
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use embassy_time::{Duration, Timer};
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bind_interrupts!(struct Irqs{
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@ -50,14 +51,14 @@ async fn main(_spawner: Spawner) {
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Timer::after(Duration::from_millis(50)).await;
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}
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// let mut rc = RadioCoprocessor::new(mbox);
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//
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// let response = rc.read().await;
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// info!("coprocessor ready {}", response);
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//
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// rc.write(&[0x01, 0x03, 0x0c, 0x00, 0x00]);
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// let response = rc.read().await;
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// info!("ble reset rsp {}", response);
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let mut rc = RadioCoprocessor::new(mbox);
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let response = rc.read().await;
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info!("coprocessor ready {}", response);
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rc.write(&[0x01, 0x03, 0x0c, 0x00, 0x00]);
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let response = rc.read().await;
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info!("ble reset rsp {}", response);
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info!("Test OK");
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cortex_m::asm::bkpt();
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