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stm32: allow setting PWM duty cycle to 100%

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Setting the compare_value to max_compare_value make the PWM output
go low when the timer reach the max_compare_value and go high again
on the next timer clock, when the value roll back to 0.
So to allow a 100% PWM that never goes low, the compare_value must
be set to max_compare_value + 1.
This commit is contained in:
Aurélien Jacobs 2023-08-18 16:10:49 +02:00
parent 5329f234ba
commit 78bb261246
2 changed files with 4 additions and 4 deletions
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4
embassy-stm32/src/timer/complementary_pwm.rs
View File

@ -100,11 +100,11 @@ impl<'d, T: ComplementaryCaptureCompare16bitInstance> ComplementaryPwm<'d, T> {
}
pub fn get_max_duty(&self) -> u16 {
self.inner.get_max_compare_value()
self.inner.get_max_compare_value() + 1
}
pub fn set_duty(&mut self, channel: Channel, duty: u16) {
assert!(duty < self.get_max_duty());
assert!(duty <= self.get_max_duty());
self.inner.set_compare_value(channel, duty)
}

4
embassy-stm32/src/timer/simple_pwm.rs
View File

@ -97,11 +97,11 @@ impl<'d, T: CaptureCompare16bitInstance> SimplePwm<'d, T> {
}
pub fn get_max_duty(&self) -> u16 {
self.inner.get_max_compare_value()
self.inner.get_max_compare_value() + 1
}
pub fn set_duty(&mut self, channel: Channel, duty: u16) {
assert!(duty < self.get_max_duty());
assert!(duty <= self.get_max_duty());
self.inner.set_compare_value(channel, duty)
}
}