usb: cleanup and simplify error handling.
This commit is contained in:
parent
60d3d11197
commit
a435d78cf7
@ -403,11 +403,9 @@ unsafe fn read_dma<T: Instance>(i: usize, buf: &mut [u8]) -> Result<usize, ReadE
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Ok(size)
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}
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unsafe fn write_dma<T: Instance>(i: usize, buf: &[u8]) -> Result<(), WriteError> {
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unsafe fn write_dma<T: Instance>(i: usize, buf: &[u8]) {
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let regs = T::regs();
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if buf.len() > 64 {
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return Err(WriteError::BufferOverflow);
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}
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assert!(buf.len() <= 64);
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let mut ram_buf: MaybeUninit<[u8; 64]> = MaybeUninit::uninit();
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let ptr = if !slice_in_ram(buf) {
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@ -441,8 +439,6 @@ unsafe fn write_dma<T: Instance>(i: usize, buf: &[u8]) -> Result<(), WriteError>
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regs.tasks_startepin[i].write(|w| w.bits(1));
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while regs.events_endepin[i].read().bits() == 0 {}
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dma_end();
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Ok(())
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}
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impl<'d, T: Instance> driver::EndpointOut for Endpoint<'d, T, Out> {
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@ -497,6 +493,8 @@ impl<'d, T: Instance> driver::EndpointIn for Endpoint<'d, T, In> {
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READY_ENDPOINTS.fetch_and(!(1 << i), Ordering::AcqRel);
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unsafe { write_dma::<T>(i, buf) }
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Ok(())
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}
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}
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}
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@ -535,9 +533,7 @@ impl<'d, T: Instance> ControlPipe<'d, T> {
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async fn write(&mut self, buf: &[u8], last_chunk: bool) {
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let regs = T::regs();
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regs.events_ep0datadone.reset();
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unsafe {
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write_dma::<T>(0, buf).unwrap();
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}
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unsafe { write_dma::<T>(0, buf) }
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regs.shorts
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.modify(|_, w| w.ep0datadone_ep0status().bit(last_chunk));
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@ -616,7 +612,7 @@ impl<'d, T: Instance> driver::ControlPipe for ControlPipe<'d, T> {
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fn data_out<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::DataOutFuture<'a> {
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async move {
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let req = self.request.unwrap();
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let req = unwrap!(self.request);
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assert!(req.direction == UsbDirection::Out);
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assert!(req.length > 0);
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@ -649,7 +645,7 @@ impl<'d, T: Instance> driver::ControlPipe for ControlPipe<'d, T> {
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debug!("control in accept {:x}", buf);
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#[cfg(not(feature = "defmt"))]
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debug!("control in accept {:x?}", buf);
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let req = self.request.unwrap();
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let req = unwrap!(self.request);
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assert!(req.direction == UsbDirection::In);
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let req_len = usize::from(req.length);
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@ -184,78 +184,57 @@ impl<'d, D: Driver<'d>> CdcAcmClass<'d, D> {
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let read_ep = builder.alloc_bulk_endpoint_out(max_packet_size);
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let write_ep = builder.alloc_bulk_endpoint_in(max_packet_size);
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builder
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.config_descriptor
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.iad(
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comm_if,
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2,
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USB_CLASS_CDC,
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CDC_SUBCLASS_ACM,
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CDC_PROTOCOL_NONE,
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)
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.unwrap();
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builder.config_descriptor.iad(
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comm_if,
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2,
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USB_CLASS_CDC,
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CDC_SUBCLASS_ACM,
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CDC_PROTOCOL_NONE,
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);
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builder.config_descriptor.interface(
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comm_if,
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USB_CLASS_CDC,
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CDC_SUBCLASS_ACM,
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CDC_PROTOCOL_NONE,
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);
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builder.config_descriptor.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_HEADER, // bDescriptorSubtype
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0x10,
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0x01, // bcdCDC (1.10)
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],
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);
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builder.config_descriptor.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_ACM, // bDescriptorSubtype
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0x00, // bmCapabilities
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],
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);
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builder.config_descriptor.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_UNION, // bDescriptorSubtype
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comm_if.into(), // bControlInterface
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data_if.into(), // bSubordinateInterface
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],
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);
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builder.config_descriptor.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_CALL_MANAGEMENT, // bDescriptorSubtype
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0x00, // bmCapabilities
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data_if.into(), // bDataInterface
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],
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);
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builder.config_descriptor.endpoint(comm_ep.info());
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builder
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.config_descriptor
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.interface(comm_if, USB_CLASS_CDC, CDC_SUBCLASS_ACM, CDC_PROTOCOL_NONE)
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.unwrap();
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builder
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.config_descriptor
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.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_HEADER, // bDescriptorSubtype
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0x10,
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0x01, // bcdCDC (1.10)
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],
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)
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.unwrap();
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builder
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.config_descriptor
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.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_ACM, // bDescriptorSubtype
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0x00, // bmCapabilities
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],
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)
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.unwrap();
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builder
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.config_descriptor
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.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_UNION, // bDescriptorSubtype
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comm_if.into(), // bControlInterface
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data_if.into(), // bSubordinateInterface
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],
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)
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.unwrap();
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builder
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.config_descriptor
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.write(
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CS_INTERFACE,
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&[
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CDC_TYPE_CALL_MANAGEMENT, // bDescriptorSubtype
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0x00, // bmCapabilities
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data_if.into(), // bDataInterface
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],
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)
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.unwrap();
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builder.config_descriptor.endpoint(comm_ep.info()).unwrap();
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builder
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.config_descriptor
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.interface(data_if, USB_CLASS_CDC_DATA, 0x00, 0x00)
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.unwrap();
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builder.config_descriptor.endpoint(write_ep.info()).unwrap();
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builder.config_descriptor.endpoint(read_ep.info()).unwrap();
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.interface(data_if, USB_CLASS_CDC_DATA, 0x00, 0x00);
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builder.config_descriptor.endpoint(write_ep.info());
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builder.config_descriptor.endpoint(read_ep.info());
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CdcAcmClass {
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comm_ep,
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@ -168,9 +168,9 @@ impl<'d, D: Driver<'d>> UsbDeviceBuilder<'d, D> {
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let mut config_descriptor = DescriptorWriter::new(config_descriptor_buf);
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let mut bos_descriptor = BosWriter::new(DescriptorWriter::new(bos_descriptor_buf));
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device_descriptor.device(&config).unwrap();
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config_descriptor.configuration(&config).unwrap();
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bos_descriptor.bos().unwrap();
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device_descriptor.device(&config);
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config_descriptor.configuration(&config);
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bos_descriptor.bos();
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UsbDeviceBuilder {
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bus,
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@ -1,13 +1,6 @@
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use super::builder::Config;
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use super::{types::*, CONFIGURATION_VALUE, DEFAULT_ALTERNATE_SETTING};
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#[derive(Debug, PartialEq, Eq, Clone, Copy)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Error {
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BufferFull,
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InvalidState,
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}
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/// Standard descriptor types
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#[allow(missing_docs)]
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pub mod descriptor_type {
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@ -69,11 +62,11 @@ impl<'a> DescriptorWriter<'a> {
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}
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/// Writes an arbitrary (usually class-specific) descriptor.
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pub fn write(&mut self, descriptor_type: u8, descriptor: &[u8]) -> Result<(), Error> {
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pub fn write(&mut self, descriptor_type: u8, descriptor: &[u8]) {
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let length = descriptor.len();
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if (self.position + 2 + length) > self.buf.len() || (length + 2) > 255 {
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return Err(Error::BufferFull);
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panic!("Descriptor buffer full");
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}
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self.buf[self.position] = (length + 2) as u8;
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@ -84,11 +77,9 @@ impl<'a> DescriptorWriter<'a> {
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self.buf[start..start + length].copy_from_slice(descriptor);
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self.position = start + length;
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Ok(())
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}
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pub(crate) fn device(&mut self, config: &Config) -> Result<(), Error> {
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pub(crate) fn device(&mut self, config: &Config) {
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self.write(
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descriptor_type::DEVICE,
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&[
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@ -112,7 +103,7 @@ impl<'a> DescriptorWriter<'a> {
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)
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}
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pub(crate) fn configuration(&mut self, config: &Config) -> Result<(), Error> {
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pub(crate) fn configuration(&mut self, config: &Config) {
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self.num_interfaces_mark = Some(self.position + 4);
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self.write_iads = config.composite_with_iads;
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@ -168,9 +159,9 @@ impl<'a> DescriptorWriter<'a> {
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function_class: u8,
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function_sub_class: u8,
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function_protocol: u8,
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) -> Result<(), Error> {
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) {
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if !self.write_iads {
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return Ok(());
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return;
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}
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self.write(
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@ -183,9 +174,7 @@ impl<'a> DescriptorWriter<'a> {
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function_protocol,
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0,
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],
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)?;
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Ok(())
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);
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}
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/// Writes a interface descriptor.
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@ -204,7 +193,7 @@ impl<'a> DescriptorWriter<'a> {
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interface_class: u8,
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interface_sub_class: u8,
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interface_protocol: u8,
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) -> Result<(), Error> {
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) {
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self.interface_alt(
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number,
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DEFAULT_ALTERNATE_SETTING,
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@ -237,11 +226,13 @@ impl<'a> DescriptorWriter<'a> {
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interface_sub_class: u8,
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interface_protocol: u8,
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interface_string: Option<StringIndex>,
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) -> Result<(), Error> {
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) {
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if alternate_setting == DEFAULT_ALTERNATE_SETTING {
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match self.num_interfaces_mark {
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Some(mark) => self.buf[mark] += 1,
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None => return Err(Error::InvalidState),
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None => {
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panic!("you can only call `interface/interface_alt` after `configuration`.")
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}
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};
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}
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@ -260,9 +251,7 @@ impl<'a> DescriptorWriter<'a> {
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interface_protocol, // bInterfaceProtocol
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str_index, // iInterface
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],
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)?;
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Ok(())
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);
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}
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/// Writes an endpoint descriptor.
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@ -271,10 +260,10 @@ impl<'a> DescriptorWriter<'a> {
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///
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/// * `endpoint` - Endpoint previously allocated with
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/// [`UsbDeviceBuilder`](crate::bus::UsbDeviceBuilder).
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pub fn endpoint(&mut self, endpoint: &EndpointInfo) -> Result<(), Error> {
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pub fn endpoint(&mut self, endpoint: &EndpointInfo) {
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match self.num_endpoints_mark {
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Some(mark) => self.buf[mark] += 1,
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None => return Err(Error::InvalidState),
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None => panic!("you can only call `endpoint` after `interface/interface_alt`."),
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};
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self.write(
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@ -286,17 +275,15 @@ impl<'a> DescriptorWriter<'a> {
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(endpoint.max_packet_size >> 8) as u8, // wMaxPacketSize
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endpoint.interval, // bInterval
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],
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)?;
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Ok(())
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);
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}
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/// Writes a string descriptor.
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pub(crate) fn string(&mut self, string: &str) -> Result<(), Error> {
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pub(crate) fn string(&mut self, string: &str) {
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let mut pos = self.position;
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if pos + 2 > self.buf.len() {
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return Err(Error::BufferFull);
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panic!("Descriptor buffer full");
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}
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self.buf[pos] = 0; // length placeholder
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@ -306,7 +293,7 @@ impl<'a> DescriptorWriter<'a> {
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for c in string.encode_utf16() {
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if pos >= self.buf.len() {
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return Err(Error::BufferFull);
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panic!("Descriptor buffer full");
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}
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self.buf[pos..pos + 2].copy_from_slice(&c.to_le_bytes());
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@ -316,8 +303,6 @@ impl<'a> DescriptorWriter<'a> {
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self.buf[self.position] = (pos - self.position) as u8;
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self.position = pos;
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Ok(())
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}
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}
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@ -335,7 +320,7 @@ impl<'a> BosWriter<'a> {
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}
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}
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pub(crate) fn bos(&mut self) -> Result<(), Error> {
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pub(crate) fn bos(&mut self) {
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self.num_caps_mark = Some(self.writer.position + 4);
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self.writer.write(
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descriptor_type::BOS,
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@ -343,11 +328,9 @@ impl<'a> BosWriter<'a> {
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0x00, 0x00, // wTotalLength
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0x00, // bNumDeviceCaps
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],
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)?;
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);
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self.capability(capability_type::USB_2_0_EXTENSION, &[0; 4])?;
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Ok(())
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self.capability(capability_type::USB_2_0_EXTENSION, &[0; 4]);
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}
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/// Writes capability descriptor to a BOS
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@ -356,17 +339,17 @@ impl<'a> BosWriter<'a> {
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///
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/// * `capability_type` - Type of a capability
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/// * `data` - Binary data of the descriptor
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pub fn capability(&mut self, capability_type: u8, data: &[u8]) -> Result<(), Error> {
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pub fn capability(&mut self, capability_type: u8, data: &[u8]) {
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match self.num_caps_mark {
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Some(mark) => self.writer.buf[mark] += 1,
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None => return Err(Error::InvalidState),
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None => panic!("called `capability` not between `bos` and `end_bos`."),
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}
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let mut start = self.writer.position;
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let blen = data.len();
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if (start + blen + 3) > self.writer.buf.len() || (blen + 3) > 255 {
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return Err(Error::BufferFull);
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panic!("Descriptor buffer full");
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}
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self.writer.buf[start] = (blen + 3) as u8;
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@ -376,8 +359,6 @@ impl<'a> BosWriter<'a> {
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start += 3;
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self.writer.buf[start..start + blen].copy_from_slice(data);
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self.writer.position = start + blen;
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Ok(())
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}
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pub(crate) fn end_bos(&mut self) {
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|
@ -158,7 +158,13 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
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// If the request has a data state, we must read it.
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let data = if req.length > 0 {
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let size = self.control.data_out(self.control_buf).await.unwrap();
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let size = match self.control.data_out(self.control_buf).await {
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Ok(size) => size,
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Err(_) => {
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warn!("usb: failed to read CONTROL OUT data stage.");
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return;
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}
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};
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&self.control_buf[0..size]
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} else {
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&[]
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@ -311,7 +317,6 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
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if index == 0 {
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self.control_in_accept_writer(req, |w| {
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w.write(descriptor_type::STRING, &lang_id::ENGLISH_US.to_le_bytes())
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.unwrap();
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})
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.await
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} else {
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@ -328,8 +333,7 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
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};
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if let Some(s) = s {
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self.control_in_accept_writer(req, |w| w.string(s).unwrap())
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.await;
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self.control_in_accept_writer(req, |w| w.string(s)).await;
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} else {
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self.control.reject()
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}
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|
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