peripheralmutex: separate interrupt registration to own method.
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0cd19a58c3
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@ -32,32 +32,33 @@ impl<S: PeripheralState> PeripheralMutex<S> {
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}
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}
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/// safety: self must be pinned.
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unsafe fn setup(&mut self) {
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self.irq.disable();
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pub fn register_interrupt(self: Pin<&mut Self>) {
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let this = unsafe { self.get_unchecked_mut() };
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if this.irq_setup_done {
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return;
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}
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this.irq.disable();
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compiler_fence(Ordering::SeqCst);
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self.irq.set_handler(|p| {
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this.irq.set_handler(|p| {
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// Safety: it's OK to get a &mut to the state, since
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// - We're in the IRQ, no one else can't preempt us
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// - We can't have preempted a with() call because the irq is disabled during it.
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let state = &mut *(p as *mut S);
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let state = unsafe { &mut *(p as *mut S) };
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state.on_interrupt();
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});
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self.irq
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.set_handler_context((&mut self.state) as *mut _ as *mut ());
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this.irq
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.set_handler_context((&mut this.state) as *mut _ as *mut ());
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compiler_fence(Ordering::SeqCst);
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self.irq.enable();
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this.irq.enable();
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self.irq_setup_done = true;
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this.irq_setup_done = true;
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}
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pub fn with<R>(self: Pin<&mut Self>, f: impl FnOnce(&mut S, &mut S::Interrupt) -> R) -> R {
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let this = unsafe { self.get_unchecked_mut() };
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if !this.irq_setup_done {
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unsafe { this.setup() }
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}
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this.irq.disable();
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compiler_fence(Ordering::SeqCst);
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@ -207,7 +207,9 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
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for BufferedUarte<'a, U, T, P1, P2>
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{
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fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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self.inner().with(|state, _irq| {
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let mut inner = self.inner();
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inner.as_mut().register_interrupt();
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inner.with(|state, _irq| {
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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// before any DMA action has started
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@ -230,7 +232,9 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
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}
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fn consume(self: Pin<&mut Self>, amt: usize) {
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self.inner().with(|state, irq| {
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let mut inner = self.inner();
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inner.as_mut().register_interrupt();
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inner.with(|state, irq| {
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trace!("consume {:?}", amt);
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state.rx.pop(amt);
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irq.pend();
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@ -242,7 +246,9 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
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for BufferedUarte<'a, U, T, P1, P2>
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{
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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self.inner().with(|state, irq| {
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let mut inner = self.inner();
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inner.as_mut().register_interrupt();
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inner.with(|state, irq| {
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trace!("poll_write: {:?}", buf.len());
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let tx_buf = state.tx.push_buf();
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@ -148,6 +148,7 @@ impl<T: Instance> FullDuplex<u8> for Spim<T> {
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slice_in_ram_or(rx, Error::DMABufferNotInDataMemory)?;
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slice_in_ram_or(tx, Error::DMABufferNotInDataMemory)?;
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self.as_mut().inner().register_interrupt();
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self.as_mut().inner().with(|s, _irq| {
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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