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peripheralmutex: separate interrupt registration to own method.

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This commit is contained in:
Dario Nieuwenhuis 2021-03-18 02:29:03 +01:00
parent 0cd19a58c3
commit b57489eb5d
3 changed files with 23 additions and 15 deletions
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25
embassy-extras/src/peripheral.rs
View File

@ -32,32 +32,33 @@ impl<S: PeripheralState> PeripheralMutex<S> {
} }
} }
/// safety: self must be pinned. pub fn register_interrupt(self: Pin<&mut Self>) {
unsafe fn setup(&mut self) { let this = unsafe { self.get_unchecked_mut() };
self.irq.disable(); if this.irq_setup_done {
return;
}
this.irq.disable();
compiler_fence(Ordering::SeqCst); compiler_fence(Ordering::SeqCst);
self.irq.set_handler(|p| { this.irq.set_handler(|p| {
// Safety: it's OK to get a &mut to the state, since // Safety: it's OK to get a &mut to the state, since
// - We're in the IRQ, no one else can't preempt us // - We're in the IRQ, no one else can't preempt us
// - We can't have preempted a with() call because the irq is disabled during it. // - We can't have preempted a with() call because the irq is disabled during it.
let state = &mut *(p as *mut S); let state = unsafe { &mut *(p as *mut S) };
state.on_interrupt(); state.on_interrupt();
}); });
self.irq this.irq
.set_handler_context((&mut self.state) as *mut _ as *mut ()); .set_handler_context((&mut this.state) as *mut _ as *mut ());
compiler_fence(Ordering::SeqCst); compiler_fence(Ordering::SeqCst);
self.irq.enable(); this.irq.enable();
self.irq_setup_done = true; this.irq_setup_done = true;
} }
pub fn with<R>(self: Pin<&mut Self>, f: impl FnOnce(&mut S, &mut S::Interrupt) -> R) -> R { pub fn with<R>(self: Pin<&mut Self>, f: impl FnOnce(&mut S, &mut S::Interrupt) -> R) -> R {
let this = unsafe { self.get_unchecked_mut() }; let this = unsafe { self.get_unchecked_mut() };
if !this.irq_setup_done {
unsafe { this.setup() }
}
this.irq.disable(); this.irq.disable();
compiler_fence(Ordering::SeqCst); compiler_fence(Ordering::SeqCst);

12
embassy-nrf/src/buffered_uarte.rs
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@ -207,7 +207,9 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
for BufferedUarte<'a, U, T, P1, P2> for BufferedUarte<'a, U, T, P1, P2>
{ {
fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> { fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
self.inner().with(|state, _irq| { let mut inner = self.inner();
inner.as_mut().register_interrupt();
inner.with(|state, _irq| {
// Conservative compiler fence to prevent optimizations that do not // Conservative compiler fence to prevent optimizations that do not
// take in to account actions by DMA. The fence has been placed here, // take in to account actions by DMA. The fence has been placed here,
// before any DMA action has started // before any DMA action has started
@ -230,7 +232,9 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
} }
fn consume(self: Pin<&mut Self>, amt: usize) { fn consume(self: Pin<&mut Self>, amt: usize) {
self.inner().with(|state, irq| { let mut inner = self.inner();
inner.as_mut().register_interrupt();
inner.with(|state, irq| {
trace!("consume {:?}", amt); trace!("consume {:?}", amt);
state.rx.pop(amt); state.rx.pop(amt);
irq.pend(); irq.pend();
@ -242,7 +246,9 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
for BufferedUarte<'a, U, T, P1, P2> for BufferedUarte<'a, U, T, P1, P2>
{ {
fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> { fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
self.inner().with(|state, irq| { let mut inner = self.inner();
inner.as_mut().register_interrupt();
inner.with(|state, irq| {
trace!("poll_write: {:?}", buf.len()); trace!("poll_write: {:?}", buf.len());
let tx_buf = state.tx.push_buf(); let tx_buf = state.tx.push_buf();

1
embassy-nrf/src/spim.rs
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@ -148,6 +148,7 @@ impl<T: Instance> FullDuplex<u8> for Spim<T> {
slice_in_ram_or(rx, Error::DMABufferNotInDataMemory)?; slice_in_ram_or(rx, Error::DMABufferNotInDataMemory)?;
slice_in_ram_or(tx, Error::DMABufferNotInDataMemory)?; slice_in_ram_or(tx, Error::DMABufferNotInDataMemory)?;
self.as_mut().inner().register_interrupt();
self.as_mut().inner().with(|s, _irq| { self.as_mut().inner().with(|s, _irq| {
// Conservative compiler fence to prevent optimizations that do not // Conservative compiler fence to prevent optimizations that do not
// take in to account actions by DMA. The fence has been placed here, // take in to account actions by DMA. The fence has been placed here,