stm32/i2c: add async, dual interrupt scaffolding.
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@ -3,21 +3,17 @@ use core::marker::PhantomData;
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use embassy_embedded_hal::SetConfig;
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use super::*;
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use crate::dma::NoDma;
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use crate::gpio::sealed::AFType;
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use crate::gpio::Pull;
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use crate::i2c::{Error, Instance, SclPin, SdaPin};
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use crate::interrupt::typelevel::Interrupt;
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use crate::pac::i2c;
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use crate::time::Hertz;
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use crate::{interrupt, Peripheral};
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/// Interrupt handler.
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pub struct InterruptHandler<T: Instance> {
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_phantom: PhantomData<T>,
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}
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impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
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unsafe fn on_interrupt() {}
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pub unsafe fn on_interrupt<T: Instance>() {
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// todo
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}
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#[non_exhaustive]
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@ -27,14 +23,6 @@ pub struct Config {
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pub scl_pullup: bool,
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}
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pub struct State {}
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impl State {
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pub(crate) const fn new() -> Self {
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Self {}
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}
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}
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pub struct I2c<'d, T: Instance, TXDMA = NoDma, RXDMA = NoDma> {
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phantom: PhantomData<&'d mut T>,
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#[allow(dead_code)]
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@ -48,7 +36,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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_peri: impl Peripheral<P = T> + 'd,
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scl: impl Peripheral<P = impl SclPin<T>> + 'd,
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sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::EventInterrupt, EventInterruptHandler<T>>
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+ interrupt::typelevel::Binding<T::ErrorInterrupt, ErrorInterruptHandler<T>>
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+ 'd,
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tx_dma: impl Peripheral<P = TXDMA> + 'd,
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rx_dma: impl Peripheral<P = RXDMA> + 'd,
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freq: Hertz,
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@ -98,6 +88,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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reg.set_pe(true);
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});
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unsafe { T::EventInterrupt::enable() };
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unsafe { T::ErrorInterrupt::enable() };
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Self {
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phantom: PhantomData,
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tx_dma,
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@ -336,6 +329,30 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
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self.blocking_write_read_timeout(addr, write, read, || Ok(()))
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}
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// Async
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pub async fn write(&mut self, _address: u8, _write: &[u8]) -> Result<(), Error>
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where
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TXDMA: crate::i2c::TxDma<T>,
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{
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todo!()
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}
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pub async fn read(&mut self, _address: u8, _buffer: &mut [u8]) -> Result<(), Error>
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where
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RXDMA: crate::i2c::RxDma<T>,
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{
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todo!()
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}
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pub async fn write_read(&mut self, _address: u8, _write: &[u8], _read: &mut [u8]) -> Result<(), Error>
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where
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RXDMA: crate::i2c::RxDma<T>,
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TXDMA: crate::i2c::TxDma<T>,
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{
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todo!()
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}
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}
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impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> {
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@ -344,77 +361,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> {
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> {
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type Error = Error;
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fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_read(addr, read)
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
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type Error = Error;
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fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
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self.blocking_write(addr, write)
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
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type Error = Error;
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fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_write_read(addr, write, read)
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}
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}
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#[cfg(feature = "unstable-traits")]
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mod eh1 {
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use super::*;
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impl embedded_hal_1::i2c::Error for Error {
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fn kind(&self) -> embedded_hal_1::i2c::ErrorKind {
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match *self {
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Self::Bus => embedded_hal_1::i2c::ErrorKind::Bus,
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Self::Arbitration => embedded_hal_1::i2c::ErrorKind::ArbitrationLoss,
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Self::Nack => {
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embedded_hal_1::i2c::ErrorKind::NoAcknowledge(embedded_hal_1::i2c::NoAcknowledgeSource::Unknown)
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}
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Self::Timeout => embedded_hal_1::i2c::ErrorKind::Other,
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Self::Crc => embedded_hal_1::i2c::ErrorKind::Other,
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Self::Overrun => embedded_hal_1::i2c::ErrorKind::Overrun,
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Self::ZeroLengthTransfer => embedded_hal_1::i2c::ErrorKind::Other,
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}
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}
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}
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impl<'d, T: Instance> embedded_hal_1::i2c::ErrorType for I2c<'d, T> {
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type Error = Error;
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}
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impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T> {
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fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_read(address, read)
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}
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fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
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self.blocking_write(address, write)
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}
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fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_write_read(address, write, read)
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}
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fn transaction(
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&mut self,
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_address: u8,
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_operations: &mut [embedded_hal_1::i2c::Operation<'_>],
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) -> Result<(), Self::Error> {
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todo!();
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}
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}
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}
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enum Mode {
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Fast,
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Standard,
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