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This commit is contained in:
René van Dorst 2023-09-07 22:32:20 +02:00
parent 336ae54a56
commit c27b0296fe
2 changed files with 8 additions and 0 deletions
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7
embassy-net-adin1110/src/lib.rs
View File

@ -32,6 +32,7 @@ pub use regs::{Config0, Config2, SpiRegisters as sr, Status0, Status1};
use crate::fmt::Bytes; use crate::fmt::Bytes;
use crate::regs::{LedCntrl, LedFunc, LedPol, LedPolarity, SpiHeader}; use crate::regs::{LedCntrl, LedFunc, LedPol, LedPolarity, SpiHeader};
/// ADIN1110 intern PHY ID
pub const PHYID: u32 = 0x0283_BC91; pub const PHYID: u32 = 0x0283_BC91;
/// Error values ADIN1110 /// Error values ADIN1110
@ -53,7 +54,9 @@ pub enum AdinError<E> {
MDIO_ACC_TIMEOUT, MDIO_ACC_TIMEOUT,
} }
/// Type alias `Result` type with `AdinError` as error type.
pub type AEResult<T, SPIError> = core::result::Result<T, AdinError<SPIError>>; pub type AEResult<T, SPIError> = core::result::Result<T, AdinError<SPIError>>;
/// Internet PHY address /// Internet PHY address
pub const MDIO_PHY_ADDR: u8 = 0x01; pub const MDIO_PHY_ADDR: u8 = 0x01;
@ -104,6 +107,7 @@ impl<const N_RX: usize, const N_TX: usize> State<N_RX, N_TX> {
} }
} }
/// ADIN1110 embassy-net driver
#[derive(Debug)] #[derive(Debug)]
pub struct ADIN1110<SPI> { pub struct ADIN1110<SPI> {
/// SPI bus /// SPI bus
@ -116,6 +120,7 @@ pub struct ADIN1110<SPI> {
} }
impl<SPI: SpiDevice> ADIN1110<SPI> { impl<SPI: SpiDevice> ADIN1110<SPI> {
/// Create a new ADIN1110 instance.
pub fn new(spi: SPI, spi_crc: bool, append_fcs_on_tx: bool) -> Self { pub fn new(spi: SPI, spi_crc: bool, append_fcs_on_tx: bool) -> Self {
Self { Self {
spi, spi,
@ -124,6 +129,7 @@ impl<SPI: SpiDevice> ADIN1110<SPI> {
} }
} }
/// Read a SPI register
pub async fn read_reg(&mut self, reg: sr) -> AEResult<u32, SPI::Error> { pub async fn read_reg(&mut self, reg: sr) -> AEResult<u32, SPI::Error> {
let mut tx_buf = Vec::<u8, 16>::new(); let mut tx_buf = Vec::<u8, 16>::new();
@ -162,6 +168,7 @@ impl<SPI: SpiDevice> ADIN1110<SPI> {
Ok(value) Ok(value)
} }
/// Write a SPI register
pub async fn write_reg(&mut self, reg: sr, value: u32) -> AEResult<(), SPI::Error> { pub async fn write_reg(&mut self, reg: sr, value: u32) -> AEResult<(), SPI::Error> {
let mut tx_buf = Vec::<u8, 16>::new(); let mut tx_buf = Vec::<u8, 16>::new();

1
embassy-net-adin1110/src/phy.rs
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@ -111,6 +111,7 @@ pub mod RegsC45 {
} }
} }
/// 10-BASE-T1x PHY functions.
pub struct Phy10BaseT1x(u8); pub struct Phy10BaseT1x(u8);
impl Default for Phy10BaseT1x { impl Default for Phy10BaseT1x {