Add a Dbgmcu
struct capable of enabling all relevant DBGMCU.cr fields.
Includes the addition of a `dbgmcu!(...)` macro table which currently takes the form of (cr, $fn_name:ident) where `$fn_name` is something like `set_dbgsleep_d1` etc. The method is unsafe, since it's performing unsafe PAC operations. Two examples modified to demonstrate its usage.
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13
embassy-stm32/src/dbgmcu/mod.rs
Normal file
13
embassy-stm32/src/dbgmcu/mod.rs
Normal file
@ -0,0 +1,13 @@
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pub struct Dbgmcu {}
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impl Dbgmcu {
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pub unsafe fn enable_all() {
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crate::pac::DBGMCU.cr().modify(|cr| {
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crate::pac::dbgmcu! {
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(cr, $fn_name:ident) => {
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cr.$fn_name(true);
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};
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}
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});
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}
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}
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@ -31,6 +31,8 @@ pub mod adc;
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pub mod clock;
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#[cfg(dac)]
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pub mod dac;
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#[cfg(dbgmcu)]
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pub mod dbgmcu;
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#[cfg(all(eth, feature = "net"))]
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pub mod eth;
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#[cfg(exti)]
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@ -18,17 +18,14 @@ use embassy_stm32::pac;
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use embassy_stm32::spi::{Config, Spi};
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use embassy_stm32::time::Hertz;
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use embedded_hal::blocking::spi::Transfer;
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use embassy_stm32::dbgmcu::Dbgmcu;
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#[entry]
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fn main() -> ! {
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info!("Hello World, dude!");
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unsafe {
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pac::DBGMCU.cr().modify(|w| {
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w.set_dbg_sleep(true);
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w.set_dbg_standby(true);
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w.set_dbg_stop(true);
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});
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Dbgmcu::enable_all();
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pac::RCC.ahb1enr().modify(|w| {
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w.set_gpioaen(true);
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@ -14,6 +14,7 @@ use embassy::time::Clock;
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use embassy::util::Forever;
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::usart::{Config, Uart};
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use embassy_stm32::dbgmcu::Dbgmcu;
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use example_common::*;
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use embassy_traits::uart::Write as _Write;
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@ -72,13 +73,9 @@ fn main() -> ! {
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let pp = unsafe { pac::Peripherals::steal() };
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pp.DBGMCU.cr.modify(|_, w| {
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w.dbgsleep_d1().set_bit();
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w.dbgstby_d1().set_bit();
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w.dbgstop_d1().set_bit();
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w.d1dbgcken().set_bit();
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w
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});
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unsafe {
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Dbgmcu::enable_all();
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}
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pp.RCC.ahb4enr.modify(|_, w| {
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w.gpioaen().set_bit();
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@ -10,6 +10,7 @@ use std::path::Path;
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use std::path::PathBuf;
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use chiptool::{generate, ir, transform};
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use chiptool::util::ToSanitizedSnakeCase;
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct Chip {
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@ -245,6 +246,21 @@ pub fn gen(options: Options) {
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peripherals: Vec::new(),
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};
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// Load DBGMCU register for chip
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let mut dbgmcu: Option<ir::IR> = core.peripherals.iter().find_map(|(name, p)| {
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if name == "DBGMCU" {
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p.block.as_ref().map(|block| {
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let bi = BlockInfo::parse(block);
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let dbgmcu_reg_path = data_dir
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.join("registers")
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.join(&format!("{}_{}.yaml", bi.module, bi.version));
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serde_yaml::from_reader(File::open(dbgmcu_reg_path).unwrap()).unwrap()
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})
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} else {
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None
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}
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});
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// Load RCC register for chip
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let rcc = core.peripherals.iter().find_map(|(name, p)| {
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if name == "RCC" {
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@ -270,12 +286,24 @@ pub fn gen(options: Options) {
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let mut peripheral_dma_channels_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_counts: HashMap<String, u8> = HashMap::new();
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let mut dma_channel_counts: HashMap<String, u8> = HashMap::new();
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let mut dbgmcu_table: Vec<Vec<String>> = Vec::new();
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let gpio_base = core.peripherals.get(&"GPIOA".to_string()).unwrap().address;
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let gpio_stride = 0x400;
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let number_suffix_re = Regex::new("^(.*?)[0-9]*$").unwrap();
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if let Some(ref mut reg) = dbgmcu {
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if let Some(ref cr) = reg.fieldsets.get("CR") {
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for field in cr.fields.iter().filter(|e| e.name.contains("DBG")) {
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let mut fn_name = String::new();
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fn_name.push_str("set_");
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fn_name.push_str( &field.name.to_sanitized_snake_case() );
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dbgmcu_table.push( vec!( "cr".into(), fn_name ));
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}
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}
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}
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let mut has_bdma = false;
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let mut has_dma = false;
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@ -559,6 +587,7 @@ pub fn gen(options: Options) {
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);
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make_table(&mut extra, "peripheral_rcc", &peripheral_rcc_table);
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make_table(&mut extra, "dma_channels", &dma_channels_table);
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make_table(&mut extra, "dbgmcu", &dbgmcu_table);
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make_peripheral_counts(&mut extra, &peripheral_counts);
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make_dma_channel_counts(&mut extra, &dma_channel_counts);
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