Fix build on nrf52832
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@ -159,7 +159,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
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// This gives us the amount of 16M ticks for 20 bits.
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// This gives us the amount of 16M ticks for 20 bits.
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let timeout = 0x8000_0000 / (baudrate as u32 / 40);
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let timeout = 0x8000_0000 / (baudrate as u32 / 40);
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timer.tasks_stop.write(|w| w.tasks_stop().set_bit());
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timer.tasks_stop.write(|w| unsafe { w.bits(1) });
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timer.bitmode.write(|w| w.bitmode()._32bit());
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timer.bitmode.write(|w| w.bitmode()._32bit());
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timer.prescaler.write(|w| unsafe { w.prescaler().bits(0) });
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timer.prescaler.write(|w| unsafe { w.prescaler().bits(0) });
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timer.cc[0].write(|w| unsafe { w.bits(timeout) });
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timer.cc[0].write(|w| unsafe { w.bits(timeout) });
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@ -322,7 +322,7 @@ impl<'a, U: Instance, T: TimerInstance, P1: ConfigurablePpi, P2: ConfigurablePpi
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RxState::Receiving => {
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RxState::Receiving => {
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trace!(" irq_rx: in state receiving");
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trace!(" irq_rx: in state receiving");
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if self.uarte.events_endrx.read().bits() != 0 {
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if self.uarte.events_endrx.read().bits() != 0 {
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self.timer.tasks_stop.write(|w| w.tasks_stop().set_bit());
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self.timer.tasks_stop.write(|w| unsafe { w.bits(1) });
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let n: usize = self.uarte.rxd.amount.read().amount().bits() as usize;
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let n: usize = self.uarte.rxd.amount.read().amount().bits() as usize;
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trace!(" irq_rx: endrx {:?}", n);
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trace!(" irq_rx: endrx {:?}", n);
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