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Merge #868

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868: Rename XXBusDevice to XXDevice. r=Dirbaio a=Dirbaio

I think the current naming is a bit odd, the EH traits are organized as "Bus" vs "Device", and XxxBusDevice is a Device (not a Bus, not both)

`@kalkyl` 

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
This commit is contained in:
bors[bot] 2022-07-18 18:15:03 +00:00 committed by GitHub
commit e5d3f01bc4
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 106 additions and 106 deletions
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40
embassy-embedded-hal/src/shared_bus/asynch/i2c.rs
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@ -3,7 +3,7 @@
//! # Example (nrf52)
//!
//! ```rust
//! use embassy_embedded_hal::shared_bus::i2c::I2cBusDevice;
//! use embassy_embedded_hal::shared_bus::i2c::I2cDevice;
//! use embassy::mutex::Mutex;
//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
//!
@ -15,11 +15,11 @@
//! let i2c_bus = I2C_BUS.put(i2c_bus);
//!
//! // Device 1, using embedded-hal-async compatible driver for QMC5883L compass
//! let i2c_dev1 = I2cBusDevice::new(i2c_bus);
//! let i2c_dev1 = I2cDevice::new(i2c_bus);
//! let compass = QMC5883L::new(i2c_dev1).await.unwrap();
//!
//! // Device 2, using embedded-hal-async compatible driver for Mpu6050 accelerometer
//! let i2c_dev2 = I2cBusDevice::new(i2c_bus);
//! let i2c_dev2 = I2cDevice::new(i2c_bus);
//! let mpu = Mpu6050::new(i2c_dev2);
//! ```
use core::future::Future;
@ -28,27 +28,27 @@ use embassy::blocking_mutex::raw::RawMutex;
use embassy::mutex::Mutex;
use embedded_hal_async::i2c;
use crate::shared_bus::I2cBusDeviceError;
use crate::shared_bus::I2cDeviceError;
use crate::SetConfig;
pub struct I2cBusDevice<'a, M: RawMutex, BUS> {
pub struct I2cDevice<'a, M: RawMutex, BUS> {
bus: &'a Mutex<M, BUS>,
}
impl<'a, M: RawMutex, BUS> I2cBusDevice<'a, M, BUS> {
impl<'a, M: RawMutex, BUS> I2cDevice<'a, M, BUS> {
pub fn new(bus: &'a Mutex<M, BUS>) -> Self {
Self { bus }
}
}
impl<'a, M: RawMutex, BUS> i2c::ErrorType for I2cBusDevice<'a, M, BUS>
impl<'a, M: RawMutex, BUS> i2c::ErrorType for I2cDevice<'a, M, BUS>
where
BUS: i2c::ErrorType,
{
type Error = I2cBusDeviceError<BUS::Error>;
type Error = I2cDeviceError<BUS::Error>;
}
impl<M, BUS> i2c::I2c for I2cBusDevice<'_, M, BUS>
impl<M, BUS> i2c::I2c for I2cDevice<'_, M, BUS>
where
M: RawMutex + 'static,
BUS: i2c::I2c + 'static,
@ -58,7 +58,7 @@ where
fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.read(address, buffer).await.map_err(I2cBusDeviceError::I2c)?;
bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}
@ -68,7 +68,7 @@ where
fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.write(address, bytes).await.map_err(I2cBusDeviceError::I2c)?;
bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}
@ -85,7 +85,7 @@ where
let mut bus = self.bus.lock().await;
bus.write_read(address, wr_buffer, rd_buffer)
.await
.map_err(I2cBusDeviceError::I2c)?;
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}
@ -103,27 +103,27 @@ where
}
}
pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
pub struct I2cDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
bus: &'a Mutex<M, BUS>,
config: BUS::Config,
}
impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> {
impl<'a, M: RawMutex, BUS: SetConfig> I2cDeviceWithConfig<'a, M, BUS> {
pub fn new(bus: &'a Mutex<M, BUS>, config: BUS::Config) -> Self {
Self { bus, config }
}
}
impl<'a, M, BUS> i2c::ErrorType for I2cBusDeviceWithConfig<'a, M, BUS>
impl<'a, M, BUS> i2c::ErrorType for I2cDeviceWithConfig<'a, M, BUS>
where
BUS: i2c::ErrorType,
M: RawMutex,
BUS: SetConfig,
{
type Error = I2cBusDeviceError<BUS::Error>;
type Error = I2cDeviceError<BUS::Error>;
}
impl<M, BUS> i2c::I2c for I2cBusDeviceWithConfig<'_, M, BUS>
impl<M, BUS> i2c::I2c for I2cDeviceWithConfig<'_, M, BUS>
where
M: RawMutex + 'static,
BUS: i2c::I2c + SetConfig + 'static,
@ -134,7 +134,7 @@ where
async move {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.read(address, buffer).await.map_err(I2cBusDeviceError::I2c)?;
bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}
@ -145,7 +145,7 @@ where
async move {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.write(address, bytes).await.map_err(I2cBusDeviceError::I2c)?;
bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}
@ -163,7 +163,7 @@ where
bus.set_config(&self.config);
bus.write_read(address, wr_buffer, rd_buffer)
.await
.map_err(I2cBusDeviceError::I2c)?;
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}

44
embassy-embedded-hal/src/shared_bus/asynch/spi.rs
View File

@ -3,7 +3,7 @@
//! # Example (nrf52)
//!
//! ```rust
//! use embassy_embedded_hal::shared_bus::spi::SpiBusDevice;
//! use embassy_embedded_hal::shared_bus::spi::SpiDevice;
//! use embassy::mutex::Mutex;
//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
//!
@ -17,12 +17,12 @@
//!
//! // Device 1, using embedded-hal-async compatible driver for ST7735 LCD display
//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1);
//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), 160, 128);
//!
//! // Device 2
//! let cs_pin2 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
//! let spi_dev2 = SpiBusDevice::new(spi_bus, cs_pin2);
//! let spi_dev2 = SpiDevice::new(spi_bus, cs_pin2);
//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128);
//! ```
use core::future::Future;
@ -33,29 +33,29 @@ use embedded_hal_1::digital::blocking::OutputPin;
use embedded_hal_1::spi::ErrorType;
use embedded_hal_async::spi;
use crate::shared_bus::SpiBusDeviceError;
use crate::shared_bus::SpiDeviceError;
use crate::SetConfig;
pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> {
pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
bus: &'a Mutex<M, BUS>,
cs: CS,
}
impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> {
impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
pub fn new(bus: &'a Mutex<M, BUS>, cs: CS) -> Self {
Self { bus, cs }
}
}
impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS>
impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
where
BUS: spi::ErrorType,
CS: OutputPin,
{
type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
impl<M, BUS, CS> spi::SpiDevice for SpiBusDevice<'_, M, BUS, CS>
impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex + 'static,
BUS: spi::SpiBusFlush + 'static,
@ -76,7 +76,7 @@ where
{
async move {
let mut bus = self.bus.lock().await;
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = f(&mut *bus).await;
@ -84,37 +84,37 @@ where
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
flush_res.map_err(SpiBusDeviceError::Spi)?;
cs_res.map_err(SpiBusDeviceError::Cs)?;
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
}
}
}
pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
bus: &'a Mutex<M, BUS>,
cs: CS,
config: BUS::Config,
}
impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> {
impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self {
Self { bus, cs, config }
}
}
impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS>
impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
where
BUS: spi::ErrorType + SetConfig,
CS: OutputPin,
M: RawMutex,
{
type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
impl<M, BUS, CS> spi::SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS>
impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex + 'static,
BUS: spi::SpiBusFlush + SetConfig + 'static,
@ -136,7 +136,7 @@ where
async move {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = f(&mut *bus).await;
@ -144,9 +144,9 @@ where
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
flush_res.map_err(SpiBusDeviceError::Spi)?;
cs_res.map_err(SpiBusDeviceError::Cs)?;
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
}

56
embassy-embedded-hal/src/shared_bus/blocking/i2c.rs
View File

@ -3,7 +3,7 @@
//! # Example (nrf52)
//!
//! ```rust
//! use embassy_embedded_hal::shared_bus::blocking::i2c::I2cBusDevice;
//! use embassy_embedded_hal::shared_bus::blocking::i2c::I2cDevice;
//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
//!
//! static I2C_BUS: Forever<NoopMutex<RefCell<Twim<TWISPI0>>>> = Forever::new();
@ -12,7 +12,7 @@
//! let i2c_bus = NoopMutex::new(RefCell::new(i2c));
//! let i2c_bus = I2C_BUS.put(i2c_bus);
//!
//! let i2c_dev1 = I2cBusDevice::new(i2c_bus);
//! let i2c_dev1 = I2cDevice::new(i2c_bus);
//! let mpu = Mpu6050::new(i2c_dev1);
//! ```
@ -23,46 +23,46 @@ use embassy::blocking_mutex::Mutex;
use embedded_hal_1::i2c::blocking::{I2c, Operation};
use embedded_hal_1::i2c::ErrorType;
use crate::shared_bus::I2cBusDeviceError;
use crate::shared_bus::I2cDeviceError;
use crate::SetConfig;
pub struct I2cBusDevice<'a, M: RawMutex, BUS> {
pub struct I2cDevice<'a, M: RawMutex, BUS> {
bus: &'a Mutex<M, RefCell<BUS>>,
}
impl<'a, M: RawMutex, BUS> I2cBusDevice<'a, M, BUS> {
impl<'a, M: RawMutex, BUS> I2cDevice<'a, M, BUS> {
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>) -> Self {
Self { bus }
}
}
impl<'a, M: RawMutex, BUS> ErrorType for I2cBusDevice<'a, M, BUS>
impl<'a, M: RawMutex, BUS> ErrorType for I2cDevice<'a, M, BUS>
where
BUS: ErrorType,
{
type Error = I2cBusDeviceError<BUS::Error>;
type Error = I2cDeviceError<BUS::Error>;
}
impl<M, BUS> I2c for I2cBusDevice<'_, M, BUS>
impl<M, BUS> I2c for I2cDevice<'_, M, BUS>
where
M: RawMutex,
BUS: I2c,
{
fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
self.bus
.lock(|bus| bus.borrow_mut().read(address, buffer).map_err(I2cBusDeviceError::I2c))
.lock(|bus| bus.borrow_mut().read(address, buffer).map_err(I2cDeviceError::I2c))
}
fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
self.bus
.lock(|bus| bus.borrow_mut().write(address, bytes).map_err(I2cBusDeviceError::I2c))
.lock(|bus| bus.borrow_mut().write(address, bytes).map_err(I2cDeviceError::I2c))
}
fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
bus.borrow_mut()
.write_read(address, wr_buffer, rd_buffer)
.map_err(I2cBusDeviceError::I2c)
.map_err(I2cDeviceError::I2c)
})
}
@ -101,68 +101,68 @@ where
}
}
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cBusDevice<'_, M, BUS>
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cDevice<'_, M, BUS>
where
M: RawMutex,
BUS: embedded_hal_02::blocking::i2c::Write<Error = E>,
{
type Error = I2cBusDeviceError<E>;
type Error = I2cDeviceError<E>;
fn write<'w>(&mut self, addr: u8, bytes: &'w [u8]) -> Result<(), Self::Error> {
self.bus
.lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cBusDeviceError::I2c))
.lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cDeviceError::I2c))
}
}
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cBusDevice<'_, M, BUS>
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cDevice<'_, M, BUS>
where
M: RawMutex,
BUS: embedded_hal_02::blocking::i2c::Read<Error = E>,
{
type Error = I2cBusDeviceError<E>;
type Error = I2cDeviceError<E>;
fn read<'w>(&mut self, addr: u8, bytes: &'w mut [u8]) -> Result<(), Self::Error> {
self.bus
.lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cBusDeviceError::I2c))
.lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cDeviceError::I2c))
}
}
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cBusDevice<'_, M, BUS>
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cDevice<'_, M, BUS>
where
M: RawMutex,
BUS: embedded_hal_02::blocking::i2c::WriteRead<Error = E>,
{
type Error = I2cBusDeviceError<E>;
type Error = I2cDeviceError<E>;
fn write_read<'w>(&mut self, addr: u8, bytes: &'w [u8], buffer: &'w mut [u8]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
bus.borrow_mut()
.write_read(addr, bytes, buffer)
.map_err(I2cBusDeviceError::I2c)
.map_err(I2cDeviceError::I2c)
})
}
}
pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
pub struct I2cDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
bus: &'a Mutex<M, RefCell<BUS>>,
config: BUS::Config,
}
impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> {
impl<'a, M: RawMutex, BUS: SetConfig> I2cDeviceWithConfig<'a, M, BUS> {
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, config: BUS::Config) -> Self {
Self { bus, config }
}
}
impl<'a, M, BUS> ErrorType for I2cBusDeviceWithConfig<'a, M, BUS>
impl<'a, M, BUS> ErrorType for I2cDeviceWithConfig<'a, M, BUS>
where
M: RawMutex,
BUS: ErrorType + SetConfig,
{
type Error = I2cBusDeviceError<BUS::Error>;
type Error = I2cDeviceError<BUS::Error>;
}
impl<M, BUS> I2c for I2cBusDeviceWithConfig<'_, M, BUS>
impl<M, BUS> I2c for I2cDeviceWithConfig<'_, M, BUS>
where
M: RawMutex,
BUS: I2c + SetConfig,
@ -171,7 +171,7 @@ where
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
bus.set_config(&self.config);
bus.read(address, buffer).map_err(I2cBusDeviceError::I2c)
bus.read(address, buffer).map_err(I2cDeviceError::I2c)
})
}
@ -179,7 +179,7 @@ where
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
bus.set_config(&self.config);
bus.write(address, bytes).map_err(I2cBusDeviceError::I2c)
bus.write(address, bytes).map_err(I2cDeviceError::I2c)
})
}
@ -188,7 +188,7 @@ where
let mut bus = bus.borrow_mut();
bus.set_config(&self.config);
bus.write_read(address, wr_buffer, rd_buffer)
.map_err(I2cBusDeviceError::I2c)
.map_err(I2cDeviceError::I2c)
})
}

64
embassy-embedded-hal/src/shared_bus/blocking/spi.rs
View File

@ -3,7 +3,7 @@
//! # Example (nrf52)
//!
//! ```rust
//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiBusDevice;
//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiDevice;
//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
//!
//! static SPI_BUS: Forever<NoopMutex<RefCell<Spim<SPI3>>>> = Forever::new();
@ -14,7 +14,7 @@
//!
//! // Device 1, using embedded-hal compatible driver for ST7735 LCD display
//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1);
//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), false, 160, 128);
//! ```
@ -24,31 +24,31 @@ use embassy::blocking_mutex::raw::RawMutex;
use embassy::blocking_mutex::Mutex;
use embedded_hal_1::digital::blocking::OutputPin;
use embedded_hal_1::spi;
use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice};
use embedded_hal_1::spi::blocking::SpiBusFlush;
use crate::shared_bus::SpiBusDeviceError;
use crate::shared_bus::SpiDeviceError;
use crate::SetConfig;
pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> {
pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
bus: &'a Mutex<M, RefCell<BUS>>,
cs: CS,
}
impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> {
impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
Self { bus, cs }
}
}
impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS>
impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
where
BUS: spi::ErrorType,
CS: OutputPin,
{
type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
impl<BUS, M, CS> SpiDevice for SpiBusDevice<'_, M, BUS, CS>
impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBusFlush,
@ -59,7 +59,7 @@ where
fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = f(&mut bus);
@ -67,78 +67,78 @@ where
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
flush_res.map_err(SpiBusDeviceError::Spi)?;
cs_res.map_err(SpiBusDeviceError::Cs)?;
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
})
}
}
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS>
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
CS: OutputPin<Error = CsErr>,
{
type Error = SpiBusDeviceError<BusErr, CsErr>;
type Error = SpiDeviceError<BusErr, CsErr>;
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = bus.transfer(words);
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
cs_res.map_err(SpiBusDeviceError::Cs)?;
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
})
}
}
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS>
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
CS: OutputPin<Error = CsErr>,
{
type Error = SpiBusDeviceError<BusErr, CsErr>;
type Error = SpiDeviceError<BusErr, CsErr>;
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = bus.write(words);
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
cs_res.map_err(SpiBusDeviceError::Cs)?;
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
})
}
}
pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
bus: &'a Mutex<M, RefCell<BUS>>,
cs: CS,
config: BUS::Config,
}
impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> {
impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self {
Self { bus, cs, config }
}
}
impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS>
impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
where
M: RawMutex,
BUS: spi::ErrorType + SetConfig,
CS: OutputPin,
{
type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
impl<BUS, M, CS> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS>
impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBusFlush + SetConfig,
@ -150,7 +150,7 @@ where
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = f(&mut bus);
@ -158,9 +158,9 @@ where
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
flush_res.map_err(SpiBusDeviceError::Spi)?;
cs_res.map_err(SpiBusDeviceError::Cs)?;
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
})
}

8
embassy-embedded-hal/src/shared_bus/mod.rs
View File

@ -9,11 +9,11 @@ pub mod asynch;
pub mod blocking;
#[derive(Copy, Clone, Eq, PartialEq, Debug)]
pub enum I2cBusDeviceError<BUS> {
pub enum I2cDeviceError<BUS> {
I2c(BUS),
}
impl<BUS> i2c::Error for I2cBusDeviceError<BUS>
impl<BUS> i2c::Error for I2cDeviceError<BUS>
where
BUS: i2c::Error + Debug,
{
@ -25,12 +25,12 @@ where
}
#[derive(Copy, Clone, Eq, PartialEq, Debug)]
pub enum SpiBusDeviceError<BUS, CS> {
pub enum SpiDeviceError<BUS, CS> {
Spi(BUS),
Cs(CS),
}
impl<BUS, CS> spi::Error for SpiBusDeviceError<BUS, CS>
impl<BUS, CS> spi::Error for SpiDeviceError<BUS, CS>
where
BUS: spi::Error + Debug,
CS: Debug,