Merge #608
608: stm32f4: add adc + example r=Dirbaio a=ain101 Example tested on stm32f407vg Discovery Board. minimal adc: no vref, dma, complex sequence Co-authored-by: Frederik <frederik@frederik.at>
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eb922c4655
@ -1 +1,240 @@
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use crate::adc::{AdcPin, Instance};
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use core::marker::PhantomData;
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use embassy::util::Unborrow;
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use embassy_hal_common::unborrow;
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use embedded_hal_02::blocking::delay::DelayUs;
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pub const VDDA_CALIB_MV: u32 = 3000;
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#[cfg(not(rcc_f4))]
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unsafe fn enable() {
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todo!()
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}
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#[cfg(rcc_f4)]
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unsafe fn enable() {
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// TODO do not enable all adc clocks if not needed
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crate::pac::RCC.apb2enr().modify(|w| w.set_adc1en(true));
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crate::pac::RCC.apb2enr().modify(|w| w.set_adc2en(true));
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crate::pac::RCC.apb2enr().modify(|w| w.set_adc3en(true));
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}
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pub enum Resolution {
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TwelveBit,
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TenBit,
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EightBit,
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SixBit,
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}
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impl Default for Resolution {
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fn default() -> Self {
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Self::TwelveBit
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}
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}
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impl Resolution {
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fn res(&self) -> crate::pac::adc::vals::Res {
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match self {
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Resolution::TwelveBit => crate::pac::adc::vals::Res::TWELVEBIT,
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Resolution::TenBit => crate::pac::adc::vals::Res::TENBIT,
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Resolution::EightBit => crate::pac::adc::vals::Res::EIGHTBIT,
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Resolution::SixBit => crate::pac::adc::vals::Res::SIXBIT,
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}
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}
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fn to_max_count(&self) -> u32 {
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match self {
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Resolution::TwelveBit => (1 << 12) - 1,
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Resolution::TenBit => (1 << 10) - 1,
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Resolution::EightBit => (1 << 8) - 1,
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Resolution::SixBit => (1 << 6) - 1,
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}
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}
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}
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pub struct Vref;
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impl<T: Instance> AdcPin<T> for Vref {}
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impl<T: Instance> super::sealed::AdcPin<T> for Vref {
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fn channel(&self) -> u8 {
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17
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}
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}
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pub struct Temperature;
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impl<T: Instance> AdcPin<T> for Temperature {}
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impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
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fn channel(&self) -> u8 {
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16
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}
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}
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pub struct Vbat;
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impl<T: Instance> AdcPin<T> for Vbat {}
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impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
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fn channel(&self) -> u8 {
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18
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}
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}
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/// ADC sample time
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///
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/// The default setting is 3 ADC clock cycles.
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#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
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pub enum SampleTime {
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Cycles3 = 0b000,
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Cycles15 = 0b001,
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Cycles28 = 0b010,
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Cycles56 = 0b011,
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Cycles85 = 0b100,
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Cycles112 = 0b101,
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Cycles144 = 0b110,
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Cycles480 = 0b111,
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}
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impl SampleTime {
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pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::Smp {
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match self {
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SampleTime::Cycles3 => crate::pac::adc::vals::Smp::CYCLES3,
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SampleTime::Cycles15 => crate::pac::adc::vals::Smp::CYCLES15,
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SampleTime::Cycles28 => crate::pac::adc::vals::Smp::CYCLES28,
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SampleTime::Cycles56 => crate::pac::adc::vals::Smp::CYCLES56,
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SampleTime::Cycles85 => crate::pac::adc::vals::Smp::CYCLES84,
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SampleTime::Cycles112 => crate::pac::adc::vals::Smp::CYCLES112,
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SampleTime::Cycles144 => crate::pac::adc::vals::Smp::CYCLES144,
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SampleTime::Cycles480 => crate::pac::adc::vals::Smp::CYCLES480,
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}
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}
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}
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impl Default for SampleTime {
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fn default() -> Self {
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Self::Cycles3
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}
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}
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pub struct Adc<'d, T: Instance> {
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sample_time: SampleTime,
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calibrated_vdda: u32,
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resolution: Resolution,
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phantom: PhantomData<&'d mut T>,
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}
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impl<'d, T> Adc<'d, T>
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where
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T: Instance,
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{
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pub fn new(_peri: impl Unborrow<Target = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
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unborrow!(_peri);
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unsafe {
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enable();
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// disable before config is set
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T::regs().cr2().modify(|reg| {
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reg.set_adon(crate::pac::adc::vals::Adon::DISABLED);
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});
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}
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delay.delay_us(20); // TODO?
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Self {
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sample_time: Default::default(),
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resolution: Resolution::default(),
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calibrated_vdda: VDDA_CALIB_MV,
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phantom: PhantomData,
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}
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}
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pub fn set_sample_time(&mut self, sample_time: SampleTime) {
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self.sample_time = sample_time;
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}
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pub fn set_resolution(&mut self, resolution: Resolution) {
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self.resolution = resolution;
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}
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/// Convert a measurement to millivolts
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pub fn to_millivolts(&self, sample: u16) -> u16 {
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((u32::from(sample) * self.calibrated_vdda) / self.resolution.to_max_count()) as u16
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}
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/// Perform a single conversion.
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fn convert(&mut self) -> u16 {
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unsafe {
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// clear end of conversion flag
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T::regs().sr().modify(|reg| {
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reg.set_eoc(crate::pac::adc::vals::Eoc::NOTCOMPLETE);
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});
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// Start conversion
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T::regs().cr2().modify(|reg| {
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reg.set_swstart(true);
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});
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while T::regs().sr().read().strt() == crate::pac::adc::vals::Strt::NOTSTARTED {
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// spin //wait for actual start
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}
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while T::regs().sr().read().eoc() == crate::pac::adc::vals::Eoc::NOTCOMPLETE {
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// spin //wait for finish
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}
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T::regs().dr().read().0 as u16
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}
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}
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pub fn read<P>(&mut self, pin: &mut P) -> u16
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where
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P: AdcPin<T>,
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P: crate::gpio::sealed::Pin,
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{
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unsafe {
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// dissable ADC
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T::regs().cr2().modify(|reg| {
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reg.set_swstart(false);
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});
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T::regs().cr2().modify(|reg| {
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reg.set_adon(crate::pac::adc::vals::Adon::DISABLED);
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});
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pin.set_as_analog();
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// Configure ADC
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T::regs()
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.cr1()
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.modify(|reg| reg.set_res(self.resolution.res()));
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// Select channel
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T::regs().sqr3().write(|reg| reg.set_sq(0, pin.channel()));
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// Configure channel
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Self::set_channel_sample_time(pin.channel(), self.sample_time);
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// enable adc
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T::regs().cr2().modify(|reg| {
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reg.set_adon(crate::pac::adc::vals::Adon::ENABLED);
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});
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let val = self.convert();
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// dissable ADC
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T::regs().cr2().modify(|reg| {
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reg.set_swstart(false);
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});
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T::regs().cr2().modify(|reg| {
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reg.set_adon(crate::pac::adc::vals::Adon::DISABLED);
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});
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val
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}
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}
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unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
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if ch <= 9 {
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T::regs()
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.smpr2()
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.modify(|reg| reg.set_smp(ch as _, sample_time.sample_time()));
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} else {
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T::regs()
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.smpr1()
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.modify(|reg| reg.set_smp((ch - 10) as _, sample_time.sample_time()));
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}
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}
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}
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26
examples/stm32f4/src/bin/adc.rs
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26
examples/stm32f4/src/bin/adc.rs
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@ -0,0 +1,26 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy::executor::Spawner;
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use embassy::time::{Delay, Duration, Timer};
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use embassy_stm32::adc::Adc;
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use embassy_stm32::Peripherals;
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use example_common::*;
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#[embassy::main]
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async fn main(_spawner: Spawner, p: Peripherals) {
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info!("Hello World!");
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let mut adc = Adc::new(p.ADC1, &mut Delay);
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let mut pin = p.PC1;
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loop {
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let v = adc.read(&mut pin);
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info!("--> {} - {} mV", v, adc.to_millivolts(v));
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Timer::after(Duration::from_millis(100)).await;
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}
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}
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