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Merge pull request #1906 from xoviat/pwr-l0

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update metapac and add low-power for l0
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xoviat 2023-09-15 00:21:24 +00:00 committed by GitHub
commit f76d94098d
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7 changed files with 54 additions and 11 deletions
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1
ci.sh
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@ -92,6 +92,7 @@ cargo batch \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wb15cc,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l072cz,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l041f6,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l073cz,defmt,exti,time-driver-any,unstable-traits,low-power \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f398ve,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f378cc,defmt,exti,time-driver-any,unstable-traits \

6
embassy-stm32/Cargo.toml
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@ -21,7 +21,7 @@ flavors = [
{ regex_feature = "stm32g4.*", target = "thumbv7em-none-eabi" },
{ regex_feature = "stm32h5.*", target = "thumbv8m.main-none-eabihf" },
{ regex_feature = "stm32h7.*", target = "thumbv7em-none-eabi" },
{ regex_feature = "stm32l0.*", target = "thumbv6m-none-eabi" },
{ regex_feature = "stm32l0.*", target = "thumbv6m-none-eabi", features = ["low-power"] },
{ regex_feature = "stm32l1.*", target = "thumbv7m-none-eabi" },
{ regex_feature = "stm32l4.*", target = "thumbv7em-none-eabi" },
{ regex_feature = "stm32l5.*", target = "thumbv8m.main-none-eabihf" },
@ -58,7 +58,7 @@ sdio-host = "0.5.0"
embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
critical-section = "1.1"
atomic-polyfill = "1.0.1"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4e6a74f69c4bc5d2d4872ba50d805e75bfe55cad" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4d58d2d6648d526feb6bc45748dc73a05d41a5f3" }
vcell = "0.1.3"
bxcan = "0.7.0"
nb = "1.0.0"
@ -77,7 +77,7 @@ critical-section = { version = "1.1", features = ["std"] }
[build-dependencies]
proc-macro2 = "1.0.36"
quote = "1.0.15"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4e6a74f69c4bc5d2d4872ba50d805e75bfe55cad", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-4d58d2d6648d526feb6bc45748dc73a05d41a5f3", default-features = false, features = ["metadata"]}
[features]
default = ["rt"]

6
embassy-stm32/src/adc/v2.rs
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@ -125,7 +125,7 @@ where
/// [Adc::read_internal()] to perform conversion.
pub fn enable_vrefint(&self) -> VrefInt {
T::common_regs().ccr().modify(|reg| {
reg.set_tsvrefe(crate::pac::adccommon::vals::Tsvrefe::ENABLED);
reg.set_tsvrefe(true);
});
VrefInt {}
@ -138,7 +138,7 @@ where
/// temperature sensor will return vbat value.
pub fn enable_temperature(&self) -> Temperature {
T::common_regs().ccr().modify(|reg| {
reg.set_tsvrefe(crate::pac::adccommon::vals::Tsvrefe::ENABLED);
reg.set_tsvrefe(true);
});
Temperature {}
@ -148,7 +148,7 @@ where
/// [Adc::read_internal()] to perform conversion.
pub fn enable_vbat(&self) -> Vbat {
T::common_regs().ccr().modify(|reg| {
reg.set_vbate(crate::pac::adccommon::vals::Vbate::ENABLED);
reg.set_vbate(true);
});
Vbat {}

15
embassy-stm32/src/low_power.rs
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@ -95,8 +95,21 @@ impl Executor {
self.time_driver.set_rtc(rtc);
#[cfg(not(stm32l0))]
crate::interrupt::typelevel::RTC_WKUP::unpend();
unsafe { crate::interrupt::typelevel::RTC_WKUP::enable() };
#[cfg(not(stm32l0))]
unsafe {
crate::interrupt::typelevel::RTC_WKUP::enable()
};
#[cfg(stm32l0)]
crate::interrupt::typelevel::RTC::unpend();
#[cfg(stm32l0)]
unsafe {
crate::interrupt::typelevel::RTC::enable()
};
rtc.enable_wakeup_line();
}

4
embassy-stm32/src/rcc/bd.rs
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@ -58,13 +58,13 @@ impl BackupDomain {
))]
#[allow(dead_code, unused_variables)]
fn modify<R>(f: impl FnOnce(&mut Bdcr) -> R) -> R {
#[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
#[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1, rtc_v2l0))]
let cr = crate::pac::PWR.cr();
#[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
let cr = crate::pac::PWR.cr1();
// TODO: Missing from PAC for l0 and f0?
#[cfg(not(any(rtc_v2f0, rtc_v2l0, rtc_v3u5)))]
#[cfg(not(any(rtc_v2f0, rtc_v3u5)))]
{
cr.modify(|w| w.set_dbp(true));
while !cr.read().dbp() {}

8
embassy-stm32/src/rcc/l0.rs
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@ -1,4 +1,6 @@
use super::bd::BackupDomain;
pub use super::bus::{AHBPrescaler, APBPrescaler};
use super::RtcClockSource;
use crate::pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw};
use crate::pac::RCC;
#[cfg(crs)]
@ -135,6 +137,7 @@ pub struct Config {
pub apb2_pre: APBPrescaler,
#[cfg(crs)]
pub enable_hsi48: bool,
pub rtc: Option<RtcClockSource>,
}
impl Default for Config {
@ -147,6 +150,7 @@ impl Default for Config {
apb2_pre: APBPrescaler::NotDivided,
#[cfg(crs)]
enable_hsi48: false,
rtc: None,
}
}
}
@ -231,6 +235,10 @@ pub(crate) unsafe fn init(config: Config) {
}
};
config.rtc.map(|rtc| {
BackupDomain::configure_ls(rtc, None);
});
RCC.cfgr().modify(|w| {
w.set_sw(sw);
w.set_hpre(config.ahb_pre.into());

25
embassy-stm32/src/rtc/v2.rs
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@ -15,7 +15,7 @@ pub(crate) enum WakeupPrescaler {
Div16 = 16,
}
#[cfg(any(stm32wb, stm32f4))]
#[cfg(any(stm32wb, stm32f4, stm32l0))]
impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel {
fn from(val: WakeupPrescaler) -> Self {
use crate::pac::rtc::vals::Wucksel;
@ -29,7 +29,7 @@ impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel {
}
}
#[cfg(any(stm32wb, stm32f4))]
#[cfg(any(stm32wb, stm32f4, stm32l0))]
impl From<crate::pac::rtc::vals::Wucksel> for WakeupPrescaler {
fn from(val: crate::pac::rtc::vals::Wucksel) -> Self {
use crate::pac::rtc::vals::Wucksel;
@ -67,10 +67,15 @@ impl super::Rtc {
pub(crate) fn start_wakeup_alarm(&self, requested_duration: embassy_time::Duration) {
use embassy_time::{Duration, TICK_HZ};
#[cfg(not(stm32l0))]
use crate::rcc::get_freqs;
#[cfg(not(stm32l0))]
let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64;
#[cfg(stm32l0)]
let rtc_hz = 32_768u64;
let rtc_ticks = requested_duration.as_ticks() * rtc_hz / TICK_HZ;
let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32);
@ -109,7 +114,14 @@ impl super::Rtc {
pub(crate) fn enable_wakeup_line(&self) {
use crate::pac::EXTI;
#[cfg(stm32l0)]
EXTI.rtsr(0).modify(|w| w.set_line(20, true));
#[cfg(stm32l0)]
EXTI.imr(0).modify(|w| w.set_line(20, true));
#[cfg(not(stm32l0))]
EXTI.rtsr(0).modify(|w| w.set_line(22, true));
#[cfg(not(stm32l0))]
EXTI.imr(0).modify(|w| w.set_line(22, true));
}
@ -126,8 +138,17 @@ impl super::Rtc {
regs.cr().modify(|w| w.set_wute(false));
regs.isr().modify(|w| w.set_wutf(false));
#[cfg(not(stm32l0))]
crate::pac::EXTI.pr(0).modify(|w| w.set_line(22, true));
#[cfg(stm32l0)]
crate::pac::EXTI.pr(0).modify(|w| w.set_line(20, true));
#[cfg(not(stm32l0))]
crate::interrupt::typelevel::RTC_WKUP::unpend();
#[cfg(stm32l0)]
crate::interrupt::typelevel::RTC::unpend();
});
critical_section::with(|cs| {