669: Add SDMMC v1 and SDIO support r=Dirbaio a=chemicstry
SDMMC v2 peripheral is an extension of SDMMC v1 (or SDIO) so I managed to reuse most of the code, with some cfg's.
Apart from small differeces in registers, the biggest change is that v2 uses internal DMA, while v1 has to use shared DMA peripheral. This makes code a bit uglier, because DMA channel for v1 has to be passed around. Not sure if it's possible to make it any cleaner.
This also adds `TransferOptions` structure to DMA, because SDMMC v1 requires setting peripheral flow control and burst transfers. Let me know if some alternative way would be prefered.
I tested this on STM32F429ZIT6 (with sd card) and STM32H745ZIT6 (with oscilloscope).
Depends on: https://github.com/embassy-rs/stm32-data/pull/130
Co-authored-by: chemicstry <chemicstry@gmail.com>
673: Inline GPIO functions r=Dirbaio a=nviennot
All GPIO functions are monomorphized (per pin). Inlining these make the ROM smaller when using opt-level="z"
Co-authored-by: Nicolas Viennot <nicolas@viennot.biz>
672: Reset peripherals on enable r=chemicstry a=chemicstry
Add reset on initialization to peripherals that did not have it before. This fixes problems when same peripheral is reinitialized at runtime multiple times.
Some exceptions:
- ADC: all ADCs share a single reset
- DCMI: does reset before enable - couldn't find anything about the order in the reference manual. Just keep it if it works?
I also fixed safety issues where global RCC registers where accessed without critical section.
Co-authored-by: chemicstry <chemicstry@gmail.com>
670: Make UART futures Send r=Dirbaio a=chemicstry
This is a quick fix to make `Uart` futures implement `Send`.
Previously they were `!Send`, because pointer to the data register was held across an await point. Simple rearrange fixes the issue.
Co-authored-by: chemicstry <chemicstry@gmail.com>
667: Remove duplicate stm32-metapac/src/common.rs with chiptool r=Dirbaio a=nviennot
There's a duplicate file common.rs with the chiptool crate. This PR makes the source of truth the one in chiptool.
This PR is a good pair with https://github.com/embassy-rs/chiptool/pull/4
Co-authored-by: Nicolas Viennot <nicolas@viennot.biz>
661: Add support for splitting stm32 usart into TX and RX r=lulf a=lulf
* Keeps existing API for usart, but wraps it in Tx and Rx sub-types
* Adds split() method similar to nRF for getting indepdendent TX and RX
parts
* Implements e-h traits for TX and RX types
Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
* Keeps existing API for usart, but wraps it in Tx and Rx sub-types
* Adds split() method similar to nRF for getting indepdendent TX and RX
parts
* Implements e-h traits for TX and RX types
* Add stm32h7 example
662: stm32: Finish unifying spi versions r=Dirbaio a=GrantM11235
Notable changes:
- `set_word_size` is always called before disabling SPE. This is important because `set_word_size` may or may not re-enable SPE.
- The rx buffer is flushed on v1 as well. I don't know if this is required.
- All functions are now generic over word size
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
