Dario Nieuwenhuis
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0e05ba688d
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nrf/saadc: remove Sample trait.
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2021-10-07 02:10:22 +02:00 |
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Dario Nieuwenhuis
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a816776cb5
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Add matrix bot
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2021-10-06 20:34:38 +02:00 |
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Dario Nieuwenhuis
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d9e2d17625
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Merge pull request #380 from bgamari/stm32g0-adc
Fix STM32G0 ADC
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2021-09-29 06:58:33 +02:00 |
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Ben Gamari
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006bbea51a
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stm32/adc: Add IN0 channel
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2021-09-29 00:32:40 -04:00 |
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Ben Gamari
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5a38cc2140
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stm32/dac: Ensure that clock is enabled
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2021-09-29 00:32:40 -04:00 |
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Ben Gamari
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0b9961584b
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stm32/adc: Ensure that clock is enabled
Sadly due to the inconsistency in clocking configuration across devices
we cannot use RccPeripheral.
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2021-09-29 00:32:40 -04:00 |
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Ben Gamari
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573e6ec373
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stm32g0: Add support for low-power run
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2021-09-28 21:19:10 -04:00 |
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Ben Gamari
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794798e225
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stm32g0: Add support for HSI divider
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2021-09-28 21:19:10 -04:00 |
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Ben Gamari
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aa4069fe10
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stm32/adc: Fix ADC support for STM32G0
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2021-09-28 21:19:10 -04:00 |
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Ben Gamari
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e2e0464d04
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stm32/adc: Factor out conversion logic
Also guard errata workaround correctly.
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2021-09-28 18:00:05 -04:00 |
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Dario Nieuwenhuis
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b6f84efd90
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Merge pull request #406 from mryndzionek/stm32f1_support
Basic STM32F1 support
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2021-09-28 19:20:23 +02:00 |
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Mariusz Ryndzionek
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d14e555ee7
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Bump stm32-data
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2021-09-28 19:11:33 +02:00 |
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Mariusz Ryndzionek
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ce361abb1b
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Changing the casts (code review request)
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2021-09-28 18:31:04 +02:00 |
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Mariusz Ryndzionek
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bce909ec1e
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Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill)
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2021-09-28 18:31:04 +02:00 |
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Dario Nieuwenhuis
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1650983e46
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Merge pull request #407 from theunkn0wn1/fix/into_af
Fix: erroneous behavior of pins being configured into AF
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2021-09-28 00:54:15 +02:00 |
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Joshua Salzedo
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ab60cfd64b
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Patch additional regressions
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2021-09-27 15:48:56 -07:00 |
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Joshua Salzedo
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67e2f9159c
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set moder::ALTERNATE last when configuring pins to AF modes.
- as per STM32F4xx_hal's impl
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2021-09-27 15:27:43 -07:00 |
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Dario Nieuwenhuis
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6aa675994d
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Merge pull request #405 from theunkn0wn1/feature/crc_hal
Feature: CRC HAL
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2021-09-27 23:55:38 +02:00 |
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Joshua Salzedo
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07e20a7443
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Pub use version-specific CRC symbols, not just the CRC struct.
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2021-09-27 11:17:31 -07:00 |
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Joshua Salzedo
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a26ffeb84b
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Cargo fmt
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2021-09-27 10:49:32 -07:00 |
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Joshua Salzedo
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e36d4f460a
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Fix variable names in crc_v2/v3.
removed `reclaim` in crc_v1.
used write instead of modify.
renamed `init` to `reset` in crc_v1.
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2021-09-27 10:46:09 -07:00 |
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Joshua Salzedo
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43ad28b9f9
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Use unborrow for CRC constructor
sort feature gates
fix repetition in CRC config names
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2021-09-27 10:38:55 -07:00 |
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Joshua Salzedo
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7392e33ad5
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cargo fmt
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2021-09-26 19:20:21 -07:00 |
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Joshua Salzedo
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e67af514e9
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Fix v2/3 module paths
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2021-09-26 19:15:54 -07:00 |
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Joshua Salzedo
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642b0825a6
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V3 is just an extension of V2, merge modules.
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2021-09-26 19:14:08 -07:00 |
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Joshua Salzedo
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f9ff5336d4
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Merge all of the crc_v2 configurations into a single modify call
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2021-09-26 18:46:19 -07:00 |
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Joshua Salzedo
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8fac444c4e
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Flesh out v2 config writes
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2021-09-26 18:39:55 -07:00 |
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Joshua Salzedo
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afef19d813
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Start work towards CRC_V2
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2021-09-26 18:26:20 -07:00 |
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Joshua Salzedo
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7899d73359
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Expose read so the value can be obtained without a write.
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2021-09-26 17:28:58 -07:00 |
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Joshua Salzedo
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c892289b2c
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Actually export CRC
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2021-09-26 17:26:33 -07:00 |
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Joshua Salzedo
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24dea91f5a
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Fix interface changes
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2021-09-26 17:24:48 -07:00 |
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Joshua Salzedo
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4760afd9f4
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Update stm32-data
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2021-09-26 16:53:32 -07:00 |
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Joshua Salzedo
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e18a27eea2
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First pass at CRC_V1
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2021-09-26 16:46:17 -07:00 |
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Joshua Salzedo
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e527892d89
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Start work on CRC_v1
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2021-09-26 16:29:22 -07:00 |
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Dario Nieuwenhuis
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f8d833e0c5
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Merge pull request #403 from mryndzionek/af_type
Small adjustment to 'set_as_af' interface
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2021-09-24 20:20:45 +02:00 |
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Mariusz Ryndzionek
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e4b37c40c9
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Code review request - moving OutputType to mod sealed
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2021-09-24 19:56:48 +02:00 |
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Mariusz Ryndzionek
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d371298a27
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Small adjustment to 'set_as_af' interface
Small adjustment to 'set_as_af' interface - v2
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2021-09-24 18:39:07 +02:00 |
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Vincent Stakenburg
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c8394ea7b9
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add latest stm32-data
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2021-09-24 18:27:39 +02:00 |
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Vincent Stakenburg
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7d6d274d55
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Add MSI and PLL clock source for L4
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2021-09-24 18:27:39 +02:00 |
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Ulf Lilleengen
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b6fc19182b
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Add pwr for L1 and update RCC to new reg block
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2021-09-23 14:51:16 +02:00 |
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Dario Nieuwenhuis
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d5b21b881e
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Merge pull request #399 from lulf/stm32l1
Support for STM32L1
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2021-09-22 12:22:42 +02:00 |
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Ulf Lilleengen
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9d45018077
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Refactor V1 SPI
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2021-09-21 14:50:23 +02:00 |
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Ulf Lilleengen
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c79485c286
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Support for STM32L1
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
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2021-09-21 14:50:23 +02:00 |
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Ulf Lilleengen
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14aa4265db
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Ensure linear stride
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2021-09-15 13:58:01 +02:00 |
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Ulf Lilleengen
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701dd9fa36
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Calculate port number based on address and stride
This allows out of order letter to port mapping
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2021-09-15 13:58:01 +02:00 |
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Ulf Lilleengen
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840a83e196
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Add support for chip definitions with a dash
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2021-09-15 13:58:01 +02:00 |
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Ulf Lilleengen
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fb697a2657
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Updates
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2021-09-15 12:46:20 +02:00 |
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Dario Nieuwenhuis
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bb72f7eb98
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Merge pull request #390 from lulf/wasm-executor
Wasm executor support
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2021-09-13 18:55:17 +02:00 |
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Ulf Lilleengen
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4e7ce29ec9
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Add missing toolchain
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2021-09-13 18:47:32 +02:00 |
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Ulf Lilleengen
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99a94f1d50
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Update version of critical-section
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2021-09-13 17:05:17 +02:00 |
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