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1631 Commits

Author SHA1 Message Date
Andres Oliva
ee5ea7aa06 cargo fmt 2023-10-11 23:34:02 +02:00
Andres Oliva
251d004708 Try using cfg! macro 2023-10-11 23:32:40 +02:00
Andres Oliva
cd68f85501 Added guards to individual APIs 2023-10-11 23:25:13 +02:00
Andres Oliva
b6c0ddb7df Move the feature gates to the i2c module instead of the pub use statement 2023-10-11 23:05:12 +02:00
Andres Oliva
ee93bbf1d4 Gate pub use _version::* 2023-10-11 22:45:54 +02:00
Andres Oliva
1cd3ae9bd5 Add comment about feature gate on I2C mod 2023-10-11 22:20:17 +02:00
Andres Oliva
bfcca79c1e Add time feature back and gate i2c on time 2023-10-11 22:12:03 +02:00
Dario Nieuwenhuis
4a43cd3982 stm32/rcc: LSE xtal is 32768hz, not 32000hz. 
Fixes #2043
 2023-10-11 13:39:04 +02:00
Dario Nieuwenhuis
b91d1eaca0 stm32/rcc: add LSE/LSI to all chips, add RTC to more chips. 2023-10-11 04:12:38 +02:00
Dario Nieuwenhuis
21915a9a3f stm32/rcc: unify L0 and L1. 2023-10-11 01:22:27 +02:00
Dario Nieuwenhuis
d0d0ceec6a stm32/rcc: rename HSE32 to HSE 2023-10-11 01:06:44 +02:00
Dario Nieuwenhuis
0cfa8d1bb5 stm32/rcc: use more PLL etc enums from PAC. 2023-10-11 00:12:33 +02:00
Andres Oliva
cd12c9cbce stm32: add timeout to I2C driver 2023-10-10 18:20:46 +02:00
Andres Vahter
3616d68aaa stm32 flash: check lock bit before unlocking 
It hardfaults if already unlocked flash is unlocked again.
 2023-10-10 12:55:43 +03:00
Gabriel Górski
7526b8edba stm32/eth: Move phy_addr from Ethernet to PHY 
Previously, PHY addressing was a concern of the `Ethernet` struct
which limited the `PHY` implementations which very often have to manage
multiple PHYs internally and thus possibly need to address many of them.

This change extends `StationManagement` to allow addressing different
PHY addresses via SMI.
 2023-10-09 13:46:56 +02:00
Dario Nieuwenhuis
6186fe0807 stm32/rcc: use PLL enums from PAC. 2023-10-09 02:48:22 +02:00
Dario Nieuwenhuis
9d311121f2
Merge pull request #2022 from HelloWorldTeraByte/impl-pwm-trait 
Implemented Pwm trait from embedded_hal for simple and complementary pwm
 2023-10-07 00:35:05 +00:00
Dario Nieuwenhuis
85c6f23dcb
Merge pull request #2018 from jamesmunns/add-derives 
Add some uncontroversial derives to Error types
 2023-10-07 00:03:10 +00:00
Dario Nieuwenhuis
3bf8e4de5f
Merge pull request #2015 from willglynn/stm32u5_faster_clocks 
stm32: u5: implement >55 MHz clock speeds
 2023-10-06 23:38:15 +00:00
randi
710874021a Implemented Pwm trait for complementary pwm from embedded_hal 2023-10-07 12:22:31 +13:00
Dario Nieuwenhuis
3a8e0d4a27 stm32: implement MCO for all chips. 2023-10-07 01:15:24 +02:00
randi
b217d147de Implemented Pwm trait from embedded_hal 2023-10-07 11:57:19 +13:00
shakencodes
68c4820dde Add MCO support for stm32wl family 2023-10-06 14:37:36 -07:00
Matt Ickstadt
f01609036f h7: implement RTC and LSE clock configuration 2023-10-06 13:28:30 -05:00
James Munns
930b8f3495 Add some uncontroversial derives to Error types 2023-10-06 17:45:35 +02:00
Will Glynn
38e7709a24 stm32: u5: implement >55 MHz clock speeds 
This commit allows STM32U5 devices to operate at 160 MHz.

On STM32U5, MSIS can run at 48 MHz and HSE can reach 50 MHz. Faster
clocks require using PLL1's R output, though PLL1 can serve other
functions besides using the R output for the system clock. This commit
extracts a public `PllConfig` struct, primarily to place associated
constructors on that type, but also with an eye towards enabling the P
and Q outputs in a later commit.

STM32U5 PLLs have various frequency requirements on each stage: after
the `m` prescaler, after the `n` multiplier, and after the `r` divider.
This commit implements the associated checks as assertions.

This commit fixes clock calculation and PLL register configuration
errors in PLL initialization.

STM32U5 has a PWR peripheral which can be configured to push Vcore into
different voltage ranges. System clocks exceeding 55 MHz require range
2, and system clocks exceeding 110 MHz require range 1. This commit
adds `voltage_range` to `Config` and configures PWR as directed.

The voltage range implies different performance limits on various clock
signals, including inside a PLL. This commit implements voltage range
<-> frequency range checks as assertions, and extracts the
otherwise-repeated MSIS, HSI16, and HSE initialization into private
methods on `Config`.

STM32U5 frequencies above 55 MHz require using the PWR EPOD booster.
The EPOD booster requires configuring a second `m` term for PLL1,
`mboost`, such that it falls in a particular range. (Recall that >50
MHz cannot be reached without PLL1, so there is no scenario where EPOD
is needed but PLL1 is not.) This commit configures and enables the EPOD
booster automatically as required.
 2023-10-05 22:13:27 -05:00
xoviat
42176b1a3a
Merge pull request #2013 from xoviat/opamp 
stm32: update metapac and fix opamp ch
 2023-10-04 21:20:42 +00:00
xoviat
e1a0635ca3 stm32: update metapac and fix opamp ch 2023-10-04 16:15:08 -05:00
Gabriel Górski
c6513f93fe stm32/gpio: Implement eh1::digital::InputPin for OutputOpenDrain 
Pins in open-drain mode are outputs and inputs simultaneously.
 2023-10-04 18:20:25 +02:00
xoviat
0c4cddfafb Merge branch 'main' of github.com:embassy-rs/embassy into opamp 2023-10-03 16:44:44 -05:00
xoviat
e561e673c2 stm32: add opamp mod and update pac 2023-10-03 16:34:13 -05:00
xoviat
bb8a1b7f1f wpan: re-enable HIL tests 2023-10-03 15:53:22 -05:00
Dario Nieuwenhuis
6e901846df
Merge pull request #1995 from JuliDi/quadspi 
[STM32] QUADSPI support bank 2
 2023-10-03 01:55:27 +00:00
xoviat
bc203ebe4b Merge branch 'main' of github.com:embassy-rs/embassy into fix-stop 2023-10-02 18:30:41 -05:00
xoviat
e042b3056d stm32: fix stop 2023-10-02 18:11:03 -05:00
Dario Nieuwenhuis
b856d760f4 stm32/rcc: reset backup domain before enabling LSE. 2023-10-02 22:12:50 +02:00
Dion Dokter
a9dc887060 Added clarifying comment 2023-10-02 21:41:30 +02:00
Dion Dokter
137e47f98d Do affect the frequency 2023-10-02 21:14:44 +02:00
Dario Nieuwenhuis
9228a6334b
Merge pull request #1996 from embassy-rs/update-nightly 
Update Nightly.
 2023-10-02 17:29:21 +00:00
Loïc Damien
bf6e06060b
stm32: avoid useless endian conversion in rng 2023-10-02 17:20:58 +02:00
Dario Nieuwenhuis
eb12114345 Remove impl_trait_projections. 2023-10-02 14:00:49 +02:00
JuliDi
bd267a6479
move stm32h7 specific import 2023-10-02 09:34:59 +02:00
JuliDi
f3aa0cfe5a
remove debug code, add some comments 2023-10-02 09:33:10 +02:00
JuliDi
6ea5aa347d
feature-gate errata workaround for h7 2023-10-02 09:30:58 +02:00
JuliDi
8c13126cff
make push/pull settings for pins explicit 2023-10-02 09:30:58 +02:00
JuliDi
81da9ca621
Bump stm32-metapac, add flash selection 2023-10-02 09:30:58 +02:00
JuliDi
729338875c
support QSPI BK2 2023-10-02 09:30:57 +02:00
Dion Dokter
561126b0d6 stm32: Add the ability to center-align timers 2023-10-01 23:09:01 +02:00
Dario Nieuwenhuis
2af97e7595 rcc/f4: fix build on stm32f446 
fixes #1989
 2023-10-01 23:01:58 +02:00
xoviat
05218a52e6 stm32: update set_config 2023-10-01 09:39:10 -05:00
xoviat
a7b1e51650
Merge pull request #1987 from tyler-gilbert/issue-1986-add-sai-receiver-driver 
Issue 1986 add sai receiver driver
 2023-10-01 14:06:25 +00:00
JuliDi
5924cc8b49
handle _C pins 2023-10-01 12:30:34 +02:00
Tyler Gilbert
0d49aaf8ca Issue #1986 fix ci build errors 2023-09-30 22:51:23 -05:00
Tyler Gilbert
5dd9e9b3b7 issue #1986 separate blocks to prevent unsafe user code 2023-09-30 22:48:49 -05:00
Tyler Gilbert
d42cfda2db Issue #1986 add PartialEq to SyncEnable to fix build error on sai_v4 2023-09-30 19:51:00 -05:00
Tyler Gilbert
d1f4511cd1 Issue #1986 update the SAI driver with receiver capability 2023-09-30 19:43:44 -05:00
xoviat
7bc57ca3f7
Merge pull request #1975 from tyler-gilbert/issue-1974-add-sai-driver 
Issue 1974 add sai driver
 2023-09-30 20:04:26 +00:00
xoviat
4999de6f82 rustfmt 2023-09-30 12:53:17 -05:00
Daniel Berlin
9b8bdad403 Fix clippy error exposed by moving out of macros 2023-09-30 13:07:11 -04:00
Daniel Berlin
3c3fb0a529 Remove unused imports 2023-09-30 12:20:31 -04:00
Daniel Berlin
dc4c27aead Move one more method out of macros 2023-09-30 12:16:47 -04:00
Daniel Berlin
74eb519810 Move trait impls out of macros 2023-09-30 12:14:20 -04:00
Daniel Berlin
61dc36b1f2 Fix small formatting issue 2023-09-30 11:36:32 -04:00
Daniel Berlin
55a0a15be2 Fix trait inconsistency between sealed traits and implementations 2023-09-30 11:19:09 -04:00
Tyler Gilbert
1be5f193c3 #Issue 1974 more whitespace fixes 2023-09-29 21:53:01 -05:00
Tyler Gilbert
4a632e08b7 #Issue 1974 fix extra whitespace 2023-09-29 21:46:19 -05:00
Tyler Gilbert
6cdee93934 #Issue 1974 fix more warnings treated as errors 2023-09-29 21:27:15 -05:00
Tyler Gilbert
5c8c1b2146 #Issue 1974 fix warnings 2023-09-29 21:16:20 -05:00
Tyler Gilbert
2addfc4b86 Merge branch 'issue-1974-add-sai-driver' of https://github.com/tyler-gilbert/embassy into issue-1974-add-sai-driver 2023-09-29 21:08:21 -05:00
Tyler Gilbert
92df87781d Issue 1974 add sai/mod file 2023-09-29 21:08:07 -05:00
Tyler
2f9b59c5cf
Merge branch 'main' into issue-1974-add-sai-driver 2023-09-29 20:02:24 -06:00
Tyler Gilbert
ce91fb2bfc Issue #1974 add SAI driver 2023-09-29 20:57:59 -05:00
Daniel Berlin
dffdb9268b
Revert "Forgot set_count_direction and set_clock_division in 32 bit instance" 2023-09-28 21:56:18 -04:00
Dario Nieuwenhuis
22e820b743
Merge pull request #1969 from dberlin/main 
Forgot set_count_direction and set_clock_division in 32 bit instance
 2023-09-29 00:38:45 +00:00
xoviat
39f1b26a39 stm32: update metapac and remove sbs 2023-09-28 19:21:02 -05:00
Daniel Berlin
e70143ef8f Forgot set_count_direction and set_clock_division in 32 bit instance 2023-09-28 20:01:04 -04:00
xoviat
d6654bf8b5
Merge pull request #1966 from xoviat/hrtim 
stm32/hrtim: move traits out of macro def'n
 2023-09-28 20:53:55 +00:00
xoviat
322a4a8401 stm32/hrtim: move traits out of macro def'n 2023-09-28 15:48:46 -05:00
Daniel Berlin
23f3889167 Add support for STM32 input capture filter 2023-09-28 09:35:43 -04:00
xoviat
a72a91ab06
Merge pull request #1963 from Mirror0/restore-f7-rtc 
Restore RTC configuration for `STM32F7` boards
 2023-09-28 11:32:50 +00:00
Dario Nieuwenhuis
e538aeacc8
Merge pull request #1960 from embassy-rs/test-eth-2 
Net fixes
 2023-09-28 03:39:10 +00:00
Dario Nieuwenhuis
6200d22438 stm32/eth: fix receiving large frames on v2. 2023-09-28 05:12:35 +02:00
xoviat
901d31e8f8
Merge pull request #1933 from xoviat/adc 
stm32: more adc cleanup
 2023-09-28 01:59:51 +00:00
xoviat
79146c4bd5 stm32/adc: cleanup f1, f3, v1, and v2 2023-09-27 20:58:46 -05:00
Daniel Berlin
f866735802 Add support for input capture function 2023-09-27 20:15:57 -04:00
Mateusz Butkiewicz
e1951f3ddf feat(stm32f7): restore rtc configuration for stm32f7 series 2023-09-27 16:08:05 +02:00
Dario Nieuwenhuis
a57e48459e stm32/rcc: remove bad limits on l5. 2023-09-26 05:15:09 +02:00
Dario Nieuwenhuis
c604d8a8f1 stm32/rcc: add voltage_scale, flash waitstates. 2023-09-26 05:15:09 +02:00
Dario Nieuwenhuis
44bb405683 stm32/usart: enable fifo mode on usartv4. 2023-09-26 04:38:53 +02:00
Dario Nieuwenhuis
5d8817d109 stm32/usart: return error instead of panicking on bad baudrate. 2023-09-26 00:19:27 +02:00
xoviat
96edbd84fb rtc: use enable on known working chips only 2023-09-25 16:38:30 -05:00
xoviat
dc400a0539 stm32/rtc: always set wakeup alarm 2023-09-25 16:27:08 -05:00
xoviat
04b09a2acb stm32/rtc: use rccperi enable 2023-09-25 16:26:29 -05:00
Dario Nieuwenhuis
bd9021ca1d Make irq token Copy+Clone 2023-09-25 22:35:31 +02:00
xoviat
2543bcafaf
Merge pull request #1945 from xoviat/bd-2 
stm32: fix bd lsi
 2023-09-24 23:41:04 +00:00
xoviat
9f2fc04caa stm32: fix bd lsi 2023-09-24 18:37:09 -05:00
Dario Nieuwenhuis
e03239e88d stm32: centralize enabling pwr, syscfg, flash. 2023-09-25 01:07:55 +02:00
xoviat
c849620cd6 stm32/lp: clamp requested_duration to avoid overflow 2023-09-22 15:35:20 -05:00
xoviat
7cf327130e stm32/low-power: create one critical-section for all time ops 2023-09-21 19:32:48 -05:00
Dario Nieuwenhuis
83b4c01273 stm32/rcc: unify h5 and h7. 2023-09-21 23:47:56 +02:00