Bob McWhirter
0d2051243e
SPIv2 + DMA.
2021-07-23 13:22:39 -04:00
Bob McWhirter
1a03f00b56
Wire up peripheral DMA channels for SPI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
3df2aadc39
Avoid borrowck issue.
2021-07-23 13:22:39 -04:00
Bob McWhirter
dedc2bac42
IntelliJ'd.
2021-07-23 13:22:39 -04:00
Bob McWhirter
4c5a234a3a
Add a non-minc write() to DMA which takes a count.
...
Use it from "read-only" SPI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
7bbad4c4e5
More unused allowances.
2021-07-23 13:22:39 -04:00
Bob McWhirter
4bcc3b06c6
Include all versions when handing to CI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
a75110296d
Annotate to avoid unused warnings for the moment.
2021-07-23 13:22:39 -04:00
Bob McWhirter
3f379e06b0
Begin reworking SPI to add DMA for stm32.
2021-07-23 13:22:39 -04:00
Bob McWhirter
fe66f0f8f8
Checkpoint.
2021-07-23 13:22:39 -04:00
Ulf Lilleengen
531093f281
Derive SPI v1 and v3 clocks automatically
2021-06-14 11:58:16 +02:00
Ulf Lilleengen
952f525af5
Provide a way for a peripheral to query its clock frequency
...
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
939ea3bbd0
Reduce generics noise
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
212bda0940
Enable clock for SPI v1 and v3
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
ee3b82b743
Auto generate SPI v2 clock enable
...
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.
Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
2021-06-08 17:20:29 +02:00
Rukai
010b2b9497
Fix stm32 warnings
2021-06-06 00:46:20 +10:00
Bob McWhirter
c00a85f9a9
Refactor SPI signal pin macro.
2021-06-03 13:12:38 -04:00
Bob McWhirter
6958091b50
Move DAC, I2C, SPI and RNG to macro-tables.
2021-06-03 13:12:38 -04:00
Dario Nieuwenhuis
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
Ulf Lilleengen
edec5833b3
Refactor SPI and fix write bug
...
* SPI write v2 was hanging in write due to an infinite loop
* SPI word write was not followed by a read back
The u8 and u16 write/read logic have been refactored into write_word and
read_word.
2021-05-27 23:05:42 +02:00
Dario Nieuwenhuis
2e6c550355
Merge pull request #197 from rukai/fix_stm32_warnings
...
Fix warnings for embassy-stm32 and embassy-stm32-examples and add .cargo/config.toml + memory.x
2021-05-21 17:25:59 +02:00
Bob McWhirter
b3eda9914b
Use the correct register names.
2021-05-20 14:24:40 -04:00
Bob McWhirter
222faccbab
Formatting.
2021-05-20 14:19:43 -04:00
Bob McWhirter
8b36269d65
Use modify instead of write for regs within a driver.
2021-05-20 14:14:31 -04:00
Bob McWhirter
d890ef98c1
Make SPIv3 work and improve v1 and v2.
2021-05-20 14:13:45 -04:00
Lucas Kent
82f9242df2
Fix warnings for embassy-stm32 and embassy-stm32-examples
2021-05-20 22:25:12 +10:00
Bob McWhirter
0d1a0934c4
Cargo fmt.
2021-05-17 13:58:49 -04:00
Bob McWhirter
1872824d56
Add SPI v3, fix up v2's af_num and remove extraneous Error enums.
2021-05-17 13:56:13 -04:00
Dario Nieuwenhuis
2303364322
Standardize module structure, fix some build failures
2021-05-17 02:04:51 +02:00
Dario Nieuwenhuis
180ca48d34
Remove AF_NUM const from pin traits, only use af_num fn
2021-05-15 03:18:15 +02:00
Dario Nieuwenhuis
8bb1bc3507
Move pin configuration to gpio mod
2021-05-15 03:07:59 +02:00
Bob McWhirter
2569d38ab4
Adjust pin-names to FooPin.
...
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
2021-05-14 10:11:43 -04:00
Bob McWhirter
9e93a0999f
Add SPIv1, use cfg_attr to pick correct impl.
...
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
2021-05-13 14:28:53 -04:00
