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Author SHA1 Message Date
Liam Murphy
94e13ef053 Fix Cc::event_compare 2021-06-29 11:39:50 +10:00
Liam Murphy
e5a5031f20 Get rid of the TODO about variant names, stop the timer before setting BITMODE and set a default frequency. 2021-06-29 11:29:32 +10:00
Liam Murphy
e7addf094b Fix Cc::wait never resolving and refactor some APIs 
I think the interrupt was getting immediately re-triggered as soon as the handler exited, so I disabled the interrupt in the handler.
 2021-06-29 10:33:41 +10:00
Dario Nieuwenhuis
f501907f9e Merge pull request #259 from thalesfragoso/block-timer 
Add BlockingTimer and features to choose tick rate
 2021-06-28 23:58:51 +02:00
Thales Fragoso
51583afc1e Add docs for BlockingTimer and rename tick features 2021-06-28 18:52:27 -03:00
Thales Fragoso
54197d1663 Add BlockingTimer and features to choose tick rate 2021-06-28 18:01:40 -03:00
Dario Nieuwenhuis
cdb0c72849 Merge pull request #255 from thalesfragoso/od-pin 
stm32: Allow for open drain configuration for output pin
 2021-06-27 19:29:18 +02:00
Thales Fragoso
c5022b1196 stm32: Make sure Output gpio driver is pushpull 2021-06-27 13:25:35 -03:00
Liam Murphy
02781ed744 Add an nRF Timer driver 
Resolves #189
 2021-06-26 17:58:36 +10:00
Thales Fragoso
0eaadfc125 stm32: Update gpio examples 2021-06-25 18:16:43 -03:00
Thales Fragoso
a3f0aa02a4 Separate OpenDrain pin to a new type 2021-06-25 17:22:51 -03:00
Dario Nieuwenhuis
e6d6e82e54 Merge pull request #257 from embassy-rs/rp-clocks 
rp: fixes and add SPi
 2021-06-25 06:43:22 +02:00
Dario Nieuwenhuis
88bc2972f6 rp/spi: add write-only spi driver 2021-06-25 06:24:14 +02:00
Dario Nieuwenhuis
9cf1d5b29c rp/clocks: fix wrong PLL setup 2021-06-25 06:24:14 +02:00
Dario Nieuwenhuis
c7c897bb72 rp/gpio: add infallible inherent methods 2021-06-25 06:24:14 +02:00
Dario Nieuwenhuis
a35c8561c7 Merge pull request #256 from embassy-rs/rp-clocks 
rp: clock setup
 2021-06-25 03:51:39 +02:00
Dario Nieuwenhuis
5a6384d199 rp: clock setup 2021-06-25 03:38:21 +02:00
Thales Fragoso
efb3b3a0a8 stm32: Allow for open drain configuration for output pin 2021-06-24 20:42:43 -03:00
Thales
e1880a19df Merge pull request #254 from thalesfragoso/f0-rcc 
F0 rcc
 2021-06-24 20:39:51 -03:00
Thales Fragoso
013792b944 Separate exti into v1 and v2 2021-06-24 20:28:06 -03:00
Thales Fragoso
1c33a3b94c #[cfg] exti 2021-06-24 19:41:04 -03:00
Thales Fragoso
210104e6dc Remove unused gpio_af from codegen 2021-06-24 19:23:51 -03:00
Thales Fragoso
409884be2a Add F0 RCC 2021-06-24 19:21:56 -03:00
Thales Fragoso
797534d1a6 Update features to include F0 2021-06-22 14:41:42 -03:00
Dario Nieuwenhuis
9e5406f761 Merge pull request #252 from thalesfragoso/net-resources 
net: Make the user pass in the StackResources in init
 2021-06-21 01:49:32 +02:00
Dario Nieuwenhuis
5a4e3ceb88 Update stm32-data (adds DBGMCU to all chips) 2021-06-21 01:38:59 +02:00
Thales Fragoso
aca0fb1065 net: Make the user pass in the StackResources in init 
By having the user pass in the resources, we can make them generic, this way
the user can choose the size of the individual resources
 2021-06-20 17:15:18 -03:00
Dario Nieuwenhuis
06d69a8028 Merge pull request #251 from embassy-rs/net-fix 
net/tcp: Fix panic when consuming 0 bytes at EOF
 2021-06-18 02:06:41 +02:00
Dario Nieuwenhuis
d94feb9fcd net/tcp: Fix panic when consuming 0 bytes at EOF 2021-06-18 01:58:14 +02:00
Dario Nieuwenhuis
0d1ae0a01e Merge pull request #247 from thalesfragoso/eth-v2 
Eth v2
 2021-06-16 16:55:39 +02:00
Thales Fragoso
098ce6e740 stm32h7: Add ethernet example 2021-06-16 16:48:35 +02:00
Thales Fragoso
77546825a1 stm32: Make vcell dependency optional 2021-06-16 16:48:35 +02:00
Thales Fragoso
598201bff3 eth-v2: Make embassy-net optional 2021-06-16 16:48:35 +02:00
Thales Fragoso
3396a51938 net: Add features for pool size and remove unwrap on smoltcp device 2021-06-16 16:48:35 +02:00
Thales Fragoso
6cecc6d4b5 eth-v2: Get hclk frequency from clock singleton 2021-06-16 16:48:35 +02:00
Thales Fragoso
f7e1f262af eth-v2: Enable source address filtering 2021-06-16 16:48:35 +02:00
Thales Fragoso
ffc19a54d6 eth-v2: Fix bug in Rx descriptors and add docs art 2021-06-16 16:48:35 +02:00
Thales Fragoso
6daa55a897 eth-v2: Fix setting the registers for the descriptors 
Also, the interrupts are set to 1 to clear, the manual could have helped
with that one...
 2021-06-16 16:48:35 +02:00
Thales Fragoso
0b42e12604 eth-v2: Fix off by one bug 2021-06-16 16:48:35 +02:00
Thales Fragoso
54ad2a41f1 eth-v2: Work around missing AF for REF_CLK 2021-06-16 16:48:35 +02:00
Thales Fragoso
0c837f07c0 eth-v2: Enable clocks in new 2021-06-16 16:48:35 +02:00
Thales Fragoso
e039c7c42c eth-v2: Remove Instance trait 2021-06-16 16:48:35 +02:00
Thales Fragoso
05a239faf6 eth-v2: Implement embassy-net's Device Trait and fix Drop 2021-06-16 16:48:35 +02:00
Thales Fragoso
4cffa200bd eth: Add lan8742a PHY 2021-06-16 16:48:35 +02:00
Thales Fragoso
46e1bae9e3 eth-v2: Start Ethernet peripheral implementation 2021-06-16 16:48:35 +02:00
Dario Nieuwenhuis
6386c34079 Merge pull request #250 from lulf/dual-core 
Add support for generating PAC for dual cores
 2021-06-16 16:46:01 +02:00
Ulf Lilleengen
a4ea08f89f Update submodule 2021-06-16 16:31:12 +02:00
Ulf Lilleengen
56c5218292 Prescaler 1 means divide by 3 on WL55 2021-06-16 16:21:16 +02:00
Ulf Lilleengen
383beb37b3 Rename from wl55 to wl5x and enable debug wfe 2021-06-16 16:07:21 +02:00
Ulf Lilleengen
b6a8703698 Add support for generating PAC for dual cores 
* Chips that have multiple cores will be exposed as chipname_corename,
  i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
  and pick the first and only core from the list
* Add support for stm32wl55 chip family
 2021-06-16 15:12:07 +02:00